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@@ -143,7 +143,8 @@ enum board_control_bits {
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RX_FIFO_RESET_BIT = 0x4,
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TX_ENABLE_BIT = 0x10,
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RX_ENABLE_BIT = 0x20,
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- DEMAND_DMA_DIRECTION_TX_BIT = 0x40, /* for channel 0, channel 1 can only transmit (when present) */
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+ DEMAND_DMA_DIRECTION_TX_BIT = 0x40,
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+ /* for ch 0, ch 1 can only transmit (when present) */
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LINE_VALID_ON_STATUS_VALID_BIT = 0x80,
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START_TX_BIT = 0x10,
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CABLE_THROTTLE_ENABLE_BIT = 0x20,
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@@ -421,9 +422,11 @@ static void init_plx9080(struct comedi_device *dev)
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bits |= PLX_DMA_EN_READYIN_BIT;
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/* enable dma chaining */
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bits |= PLX_EN_CHAIN_BIT;
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- /* enable interrupt on dma done (probably don't need this, since chain never finishes) */
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+ /* enable interrupt on dma done
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+ * (probably don't need this, since chain never finishes) */
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bits |= PLX_EN_DMA_DONE_INTR_BIT;
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- /* don't increment local address during transfers (we are transferring from a fixed fifo register) */
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+ /* don't increment local address during transfers
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+ * (we are transferring from a fixed fifo register) */
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bits |= PLX_LOCAL_ADDR_CONST_BIT;
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/* route dma interrupt to pci bus */
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bits |= PLX_DMA_INTR_PCI_BIT;
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@@ -680,38 +683,35 @@ static int hpdi_detach(struct comedi_device *dev)
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if (dev->irq)
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free_irq(dev->irq, dev);
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- if (priv(dev)) {
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- if (priv(dev)->hw_dev) {
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- if (priv(dev)->plx9080_iobase) {
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- disable_plx_interrupts(dev);
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- iounmap((void *)priv(dev)->plx9080_iobase);
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- }
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- if (priv(dev)->hpdi_iobase)
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- iounmap((void *)priv(dev)->hpdi_iobase);
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- /* free pci dma buffers */
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- for (i = 0; i < NUM_DMA_BUFFERS; i++) {
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- if (priv(dev)->dio_buffer[i])
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- pci_free_consistent(priv(dev)->hw_dev,
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- DMA_BUFFER_SIZE,
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- priv(dev)->
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- dio_buffer[i],
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- priv
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- (dev)->dio_buffer_phys_addr
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- [i]);
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- }
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- /* free dma descriptors */
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- if (priv(dev)->dma_desc)
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+ if ((priv(dev)) && (priv(dev)->hw_dev)) {
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+ if (priv(dev)->plx9080_iobase) {
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+ disable_plx_interrupts(dev);
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+ iounmap((void *)priv(dev)->plx9080_iobase);
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+ }
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+ if (priv(dev)->hpdi_iobase)
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+ iounmap((void *)priv(dev)->hpdi_iobase);
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+ /* free pci dma buffers */
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+ for (i = 0; i < NUM_DMA_BUFFERS; i++) {
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+ if (priv(dev)->dio_buffer[i])
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pci_free_consistent(priv(dev)->hw_dev,
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- sizeof(struct plx_dma_desc)
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- * NUM_DMA_DESCRIPTORS,
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- priv(dev)->dma_desc,
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+ DMA_BUFFER_SIZE,
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priv(dev)->
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- dma_desc_phys_addr);
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- if (priv(dev)->hpdi_phys_iobase) {
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- comedi_pci_disable(priv(dev)->hw_dev);
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- }
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- pci_dev_put(priv(dev)->hw_dev);
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+ dio_buffer[i],
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+ priv
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+ (dev)->dio_buffer_phys_addr
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+ [i]);
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}
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+ /* free dma descriptors */
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+ if (priv(dev)->dma_desc)
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+ pci_free_consistent(priv(dev)->hw_dev,
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+ sizeof(struct plx_dma_desc)
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+ * NUM_DMA_DESCRIPTORS,
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+ priv(dev)->dma_desc,
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+ priv(dev)->
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+ dma_desc_phys_addr);
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+ if (priv(dev)->hpdi_phys_iobase)
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+ comedi_pci_disable(priv(dev)->hw_dev);
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+ pci_dev_put(priv(dev)->hw_dev);
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}
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return 0;
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}
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@@ -814,15 +814,16 @@ static int di_cmd_test(struct comedi_device *dev, struct comedi_subdevice *s,
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if (err)
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return 4;
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- if (cmd->chanlist) {
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- for (i = 1; i < cmd->chanlist_len; i++) {
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- if (CR_CHAN(cmd->chanlist[i]) != i) {
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- /* XXX could support 8 channels or 16 channels */
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- comedi_error(dev,
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- "chanlist must be channels 0 to 31 in order");
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- err++;
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- break;
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- }
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+ if (!cmd->chanlist)
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+ return 0;
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+
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+ for (i = 1; i < cmd->chanlist_len; i++) {
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+ if (CR_CHAN(cmd->chanlist[i]) != i) {
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+ /* XXX could support 8 or 16 channels */
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+ comedi_error(dev,
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+ "chanlist must be ch 0 to 31 in order");
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+ err++;
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+ break;
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}
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}
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@@ -835,9 +836,9 @@ static int di_cmd_test(struct comedi_device *dev, struct comedi_subdevice *s,
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static int hpdi_cmd_test(struct comedi_device *dev, struct comedi_subdevice *s,
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struct comedi_cmd *cmd)
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{
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- if (priv(dev)->dio_config_output) {
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+ if (priv(dev)->dio_config_output)
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return -EINVAL;
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- } else
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+ else
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return di_cmd_test(dev, s, cmd);
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}
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@@ -903,9 +904,9 @@ static int di_cmd(struct comedi_device *dev, struct comedi_subdevice *s)
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static int hpdi_cmd(struct comedi_device *dev, struct comedi_subdevice *s)
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{
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- if (priv(dev)->dio_config_output) {
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+ if (priv(dev)->dio_config_output)
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return -EINVAL;
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- } else
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+ else
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return di_cmd(dev, s);
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}
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@@ -967,14 +968,12 @@ static irqreturn_t handle_interrupt(int irq, void *d)
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uint8_t dma0_status, dma1_status;
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unsigned long flags;
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- if (!dev->attached) {
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+ if (!dev->attached)
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return IRQ_NONE;
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- }
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plx_status = readl(priv(dev)->plx9080_iobase + PLX_INTRCS_REG);
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- if ((plx_status & (ICS_DMA0_A | ICS_DMA1_A | ICS_LIA)) == 0) {
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+ if ((plx_status & (ICS_DMA0_A | ICS_DMA1_A | ICS_LIA)) == 0)
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return IRQ_NONE;
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- }
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hpdi_intr_status = readl(priv(dev)->hpdi_iobase + INTERRUPT_STATUS_REG);
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hpdi_board_status = readl(priv(dev)->hpdi_iobase + BOARD_STATUS_REG);
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@@ -994,9 +993,8 @@ static irqreturn_t handle_interrupt(int irq, void *d)
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priv(dev)->plx9080_iobase + PLX_DMA0_CS_REG);
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DEBUG_PRINT("dma0 status 0x%x\n", dma0_status);
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- if (dma0_status & PLX_DMA_EN_BIT) {
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+ if (dma0_status & PLX_DMA_EN_BIT)
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drain_dma_buffers(dev, 0);
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- }
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DEBUG_PRINT(" cleared dma ch0 interrupt\n");
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}
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spin_unlock_irqrestore(&dev->spinlock, flags);
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