Home Explore Help
Sign In
GfA
/
linux_kernel
5
0
Fork 0
Files Issues 0 Pull Requests 0 Wiki
Browse Source

ARM: tegra: Remove redundant ARM_L1_CACHE_SHIFT_6 select

These two are both ARMv7 SoCs.  They need not explicitly select
ARM_L1_CACHE_SHIFT_6 because it is enabled along with CPU_V7.

Refer to commit a092f2b15399 ("ARM: 7291/1: cache: assume 64-byte L1
cachelines for ARMv7 CPUs").

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
Masahiro Yamada 9 years ago
parent
f55532a0c0
commit
955d809bde
1 changed files with 0 additions and 2 deletions
Split View Show Diff Stats
  1. 0 2
      drivers/soc/tegra/Kconfig

+ 0 - 2
drivers/soc/tegra/Kconfig
View File 

@@ -31,7 +31,6 @@ config ARCH_TEGRA_3x_SOC
 
 config ARCH_TEGRA_114_SOC
 
 	bool "Enable support for Tegra114 family"
 
 	select ARM_ERRATA_798181 if SMP
 
-	select ARM_L1_CACHE_SHIFT_6
 
 	select HAVE_ARM_ARCH_TIMER
 
 	select PINCTRL_TEGRA114
 
 	select TEGRA_TIMER
 
@@ -41,7 +40,6 @@ config ARCH_TEGRA_114_SOC
 
 
 config ARCH_TEGRA_124_SOC
 
 	bool "Enable support for Tegra124 family"
 
-	select ARM_L1_CACHE_SHIFT_6
 
 	select HAVE_ARM_ARCH_TIMER
 
 	select PINCTRL_TEGRA124
 
 	select TEGRA_TIMER