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+TI CPUFreq and OPP bindings
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+================================
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+
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+Certain TI SoCs, like those in the am335x, am437x, am57xx, and dra7xx
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+families support different OPPs depending on the silicon variant in use.
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+The ti-cpufreq driver can use revision and an efuse value from the SoC to
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+provide the OPP framework with supported hardware information. This is
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+used to determine which OPPs from the operating-points-v2 table get enabled
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+when it is parsed by the OPP framework.
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+
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+Required properties:
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+--------------------
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+In 'cpus' nodes:
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+- operating-points-v2: Phandle to the operating-points-v2 table to use.
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+
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+In 'operating-points-v2' table:
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+- compatible: Should be
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+ - 'operating-points-v2-ti-cpu' for am335x, am43xx, and dra7xx/am57xx SoCs
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+- syscon: A phandle pointing to a syscon node representing the control module
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+ register space of the SoC.
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+
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+Optional properties:
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+--------------------
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+For each opp entry in 'operating-points-v2' table:
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+- opp-supported-hw: Two bitfields indicating:
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+ 1. Which revision of the SoC the OPP is supported by
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+ 2. Which eFuse bits indicate this OPP is available
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+
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+ A bitwise AND is performed against these values and if any bit
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+ matches, the OPP gets enabled.
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+
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+Example:
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+--------
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+
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+/* From arch/arm/boot/dts/am33xx.dtsi */
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+cpus {
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+ #address-cells = <1>;
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+ #size-cells = <0>;
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+ cpu@0 {
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+ compatible = "arm,cortex-a8";
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+ device_type = "cpu";
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+ reg = <0>;
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+
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+ operating-points-v2 = <&cpu0_opp_table>;
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+
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+ clocks = <&dpll_mpu_ck>;
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+ clock-names = "cpu";
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+
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+ clock-latency = <300000>; /* From omap-cpufreq driver */
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+ };
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+};
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+
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+/*
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+ * cpu0 has different OPPs depending on SoC revision and some on revisions
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+ * 0x2 and 0x4 have eFuse bits that indicate if they are available or not
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+ */
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+cpu0_opp_table: opp-table {
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+ compatible = "operating-points-v2-ti-cpu";
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+ syscon = <&scm_conf>;
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+
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+ /*
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+ * The three following nodes are marked with opp-suspend
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+ * because they can not be enabled simultaneously on a
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+ * single SoC.
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+ */
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+ opp50@300000000 {
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+ opp-hz = /bits/ 64 <300000000>;
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+ opp-microvolt = <950000 931000 969000>;
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+ opp-supported-hw = <0x06 0x0010>;
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+ opp-suspend;
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+ };
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+
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+ opp100@275000000 {
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+ opp-hz = /bits/ 64 <275000000>;
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+ opp-microvolt = <1100000 1078000 1122000>;
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+ opp-supported-hw = <0x01 0x00FF>;
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+ opp-suspend;
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+ };
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+
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+ opp100@300000000 {
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+ opp-hz = /bits/ 64 <300000000>;
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+ opp-microvolt = <1100000 1078000 1122000>;
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+ opp-supported-hw = <0x06 0x0020>;
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+ opp-suspend;
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+ };
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+
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+ opp100@500000000 {
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+ opp-hz = /bits/ 64 <500000000>;
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+ opp-microvolt = <1100000 1078000 1122000>;
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+ opp-supported-hw = <0x01 0xFFFF>;
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+ };
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+
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+ opp100@600000000 {
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+ opp-hz = /bits/ 64 <600000000>;
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+ opp-microvolt = <1100000 1078000 1122000>;
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+ opp-supported-hw = <0x06 0x0040>;
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+ };
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+
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+ opp120@600000000 {
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+ opp-hz = /bits/ 64 <600000000>;
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+ opp-microvolt = <1200000 1176000 1224000>;
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+ opp-supported-hw = <0x01 0xFFFF>;
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+ };
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+
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+ opp120@720000000 {
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+ opp-hz = /bits/ 64 <720000000>;
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+ opp-microvolt = <1200000 1176000 1224000>;
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+ opp-supported-hw = <0x06 0x0080>;
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+ };
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+
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+ oppturbo@720000000 {
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+ opp-hz = /bits/ 64 <720000000>;
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+ opp-microvolt = <1260000 1234800 1285200>;
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+ opp-supported-hw = <0x01 0xFFFF>;
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+ };
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+
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+ oppturbo@800000000 {
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+ opp-hz = /bits/ 64 <800000000>;
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+ opp-microvolt = <1260000 1234800 1285200>;
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+ opp-supported-hw = <0x06 0x0100>;
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+ };
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+
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+ oppnitro@1000000000 {
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+ opp-hz = /bits/ 64 <1000000000>;
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+ opp-microvolt = <1325000 1298500 1351500>;
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+ opp-supported-hw = <0x04 0x0200>;
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+ };
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+};
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