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@@ -1635,34 +1635,15 @@ static void pl011_shutdown_channel(struct uart_amba_port *uap,
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writew(val, uap->port.membase + lcrh);
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}
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-static void pl011_shutdown(struct uart_port *port)
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+/*
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+ * disable the port. It should not disable RTS and DTR.
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+ * Also RTS and DTR state should be preserved to restore
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+ * it during startup().
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+ */
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+static void pl011_disable_uart(struct uart_amba_port *uap)
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{
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- struct uart_amba_port *uap =
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- container_of(port, struct uart_amba_port, port);
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unsigned int cr;
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- /*
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- * disable all interrupts
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- */
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- spin_lock_irq(&uap->port.lock);
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- uap->im = 0;
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- writew(uap->im, uap->port.membase + UART011_IMSC);
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- writew(0xffff, uap->port.membase + UART011_ICR);
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- spin_unlock_irq(&uap->port.lock);
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-
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- pl011_dma_shutdown(uap);
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-
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- /*
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- * Free the interrupt
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- */
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- free_irq(uap->port.irq, uap);
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-
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- /*
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- * disable the port
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- * disable the port. It should not disable RTS and DTR.
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- * Also RTS and DTR state should be preserved to restore
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- * it during startup().
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- */
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uap->autorts = false;
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spin_lock_irq(&uap->port.lock);
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cr = readw(uap->port.membase + UART011_CR);
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@@ -1678,6 +1659,32 @@ static void pl011_shutdown(struct uart_port *port)
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pl011_shutdown_channel(uap, uap->lcrh_rx);
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if (uap->lcrh_rx != uap->lcrh_tx)
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pl011_shutdown_channel(uap, uap->lcrh_tx);
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+}
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+
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+static void pl011_disable_interrupts(struct uart_amba_port *uap)
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+{
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+ spin_lock_irq(&uap->port.lock);
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+
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+ /* mask all interrupts and clear all pending ones */
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+ uap->im = 0;
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+ writew(uap->im, uap->port.membase + UART011_IMSC);
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+ writew(0xffff, uap->port.membase + UART011_ICR);
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+
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+ spin_unlock_irq(&uap->port.lock);
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+}
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+
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+static void pl011_shutdown(struct uart_port *port)
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+{
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+ struct uart_amba_port *uap =
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+ container_of(port, struct uart_amba_port, port);
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+
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+ pl011_disable_interrupts(uap);
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+
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+ pl011_dma_shutdown(uap);
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+
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+ free_irq(uap->port.irq, uap);
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+
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+ pl011_disable_uart(uap);
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/*
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* Shut down the clock producer
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