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@@ -1308,24 +1308,46 @@ static int __maybe_unused rockchip_pcie_resume_noirq(struct device *dev)
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}
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}
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- clk_prepare_enable(rockchip->clk_pcie_pm);
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- clk_prepare_enable(rockchip->hclk_pcie);
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- clk_prepare_enable(rockchip->aclk_perf_pcie);
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- clk_prepare_enable(rockchip->aclk_pcie);
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+ err = clk_prepare_enable(rockchip->clk_pcie_pm);
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+ if (err)
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+ goto err_pcie_pm;
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+
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+ err = clk_prepare_enable(rockchip->hclk_pcie);
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+ if (err)
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+ goto err_hclk_pcie;
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+
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+ err = clk_prepare_enable(rockchip->aclk_perf_pcie);
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+ if (err)
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+ goto err_aclk_perf_pcie;
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+
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+ err = clk_prepare_enable(rockchip->aclk_pcie);
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+ if (err)
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+ goto err_aclk_pcie;
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err = rockchip_pcie_init_port(rockchip);
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if (err)
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- return err;
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+ goto err_pcie_resume;
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err = rockchip_pcie_cfg_atu(rockchip);
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if (err)
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- return err;
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+ goto err_pcie_resume;
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/* Need this to enter L1 again */
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rockchip_pcie_update_txcredit_mui(rockchip);
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rockchip_pcie_enable_interrupts(rockchip);
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return 0;
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+
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+err_pcie_resume:
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+ clk_disable_unprepare(rockchip->aclk_pcie);
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+err_aclk_pcie:
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+ clk_disable_unprepare(rockchip->aclk_perf_pcie);
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+err_aclk_perf_pcie:
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+ clk_disable_unprepare(rockchip->hclk_pcie);
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+err_hclk_pcie:
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+ clk_disable_unprepare(rockchip->clk_pcie_pm);
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+err_pcie_pm:
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+ return err;
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}
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static int rockchip_pcie_probe(struct platform_device *pdev)
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