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@@ -53,18 +53,27 @@ static inline u32 __raw_readl(const volatile void __iomem *addr)
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#endif
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#define readb __raw_readb
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+#ifndef readb_relaxed
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+#define readb_relaxed readb
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+#endif
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#define readw readw
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static inline u16 readw(const volatile void __iomem *addr)
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{
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return __le16_to_cpu(__raw_readw(addr));
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}
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+#ifndef readw_relaxed
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+#define readw_relaxed readw
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+#endif
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#define readl readl
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static inline u32 readl(const volatile void __iomem *addr)
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{
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return __le32_to_cpu(__raw_readl(addr));
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}
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+#ifndef readl_relaxed
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+#define readl_relaxed readl
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+#endif
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#ifndef __raw_writeb
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static inline void __raw_writeb(u8 b, volatile void __iomem *addr)
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@@ -88,8 +97,19 @@ static inline void __raw_writel(u32 b, volatile void __iomem *addr)
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#endif
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#define writeb __raw_writeb
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+#ifndef writeb_relaxed
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+#define writeb_relaxed writeb
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+#endif
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+
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#define writew(b,addr) __raw_writew(__cpu_to_le16(b),addr)
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+#ifndef writew_relaxed
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+#define writew_relaxed writew
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+#endif
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+
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#define writel(b,addr) __raw_writel(__cpu_to_le32(b),addr)
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+#ifndef writel_relaxed
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+#define writel_relaxed writel
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+#endif
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#ifdef CONFIG_64BIT
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#ifndef __raw_readq
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@@ -104,6 +124,9 @@ static inline u64 readq(const volatile void __iomem *addr)
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{
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return __le64_to_cpu(__raw_readq(addr));
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}
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+#ifndef readq_relaxed
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+#define readq_relaxed readq
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+#endif
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#ifndef __raw_writeq
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static inline void __raw_writeq(u64 b, volatile void __iomem *addr)
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@@ -113,6 +136,9 @@ static inline void __raw_writeq(u64 b, volatile void __iomem *addr)
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#endif
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#define writeq(b, addr) __raw_writeq(__cpu_to_le64(b), addr)
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+#ifndef writeq_relaxed
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+#define writeq_relaxed writeq
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+#endif
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#endif /* CONFIG_64BIT */
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#ifndef PCI_IOBASE
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