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@@ -45,6 +45,7 @@
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static struct oct_rx_group {
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int irq;
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+ int group;
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struct napi_struct napi;
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} oct_rx_group;
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@@ -146,7 +147,7 @@ static inline int cvm_oct_check_rcv_error(cvmx_wqe_t *work)
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return 0;
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}
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-static int cvm_oct_poll(int budget)
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+static int cvm_oct_poll(struct oct_rx_group *rx_group, int budget)
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{
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const int coreid = cvmx_get_core_num();
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u64 old_group_mask;
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@@ -168,13 +169,13 @@ static int cvm_oct_poll(int budget)
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if (OCTEON_IS_MODEL(OCTEON_CN68XX)) {
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old_group_mask = cvmx_read_csr(CVMX_SSO_PPX_GRP_MSK(coreid));
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cvmx_write_csr(CVMX_SSO_PPX_GRP_MSK(coreid),
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- 1ull << pow_receive_group);
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+ BIT(rx_group->group));
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cvmx_read_csr(CVMX_SSO_PPX_GRP_MSK(coreid)); /* Flush */
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} else {
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old_group_mask = cvmx_read_csr(CVMX_POW_PP_GRP_MSKX(coreid));
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cvmx_write_csr(CVMX_POW_PP_GRP_MSKX(coreid),
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(old_group_mask & ~0xFFFFull) |
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- 1 << pow_receive_group);
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+ BIT(rx_group->group));
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}
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if (USE_ASYNC_IOBDMA) {
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@@ -199,15 +200,15 @@ static int cvm_oct_poll(int budget)
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if (!work) {
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if (OCTEON_IS_MODEL(OCTEON_CN68XX)) {
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cvmx_write_csr(CVMX_SSO_WQ_IQ_DIS,
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- 1ull << pow_receive_group);
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+ BIT(rx_group->group));
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cvmx_write_csr(CVMX_SSO_WQ_INT,
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- 1ull << pow_receive_group);
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+ BIT(rx_group->group));
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} else {
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union cvmx_pow_wq_int wq_int;
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wq_int.u64 = 0;
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- wq_int.s.iq_dis = 1 << pow_receive_group;
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- wq_int.s.wq_int = 1 << pow_receive_group;
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+ wq_int.s.iq_dis = BIT(rx_group->group);
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+ wq_int.s.wq_int = BIT(rx_group->group);
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cvmx_write_csr(CVMX_POW_WQ_INT, wq_int.u64);
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}
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break;
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@@ -422,7 +423,7 @@ static int cvm_oct_napi_poll(struct napi_struct *napi, int budget)
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napi);
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int rx_count;
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- rx_count = cvm_oct_poll(budget);
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+ rx_count = cvm_oct_poll(rx_group, budget);
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if (rx_count < budget) {
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/* No more work */
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@@ -441,7 +442,7 @@ static int cvm_oct_napi_poll(struct napi_struct *napi, int budget)
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*/
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void cvm_oct_poll_controller(struct net_device *dev)
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{
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- cvm_oct_poll(16);
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+ cvm_oct_poll(&oct_rx_group, 16);
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}
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#endif
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@@ -465,6 +466,7 @@ void cvm_oct_rx_initialize(void)
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napi_enable(&oct_rx_group.napi);
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oct_rx_group.irq = OCTEON_IRQ_WORKQ0 + pow_receive_group;
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+ oct_rx_group.group = pow_receive_group;
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/* Register an IRQ handler to receive POW interrupts */
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i = request_irq(oct_rx_group.irq, cvm_oct_do_interrupt, 0, "Ethernet",
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