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@@ -184,6 +184,7 @@ enum GECMR_BIT {
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/* EDMR */
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/* EDMR */
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enum DMAC_M_BIT {
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enum DMAC_M_BIT {
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+ EDMR_NBST = 0x80,
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EDMR_EL = 0x40, /* Litte endian */
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EDMR_EL = 0x40, /* Litte endian */
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EDMR_DL1 = 0x20, EDMR_DL0 = 0x10,
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EDMR_DL1 = 0x20, EDMR_DL0 = 0x10,
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EDMR_SRST_GETHER = 0x03,
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EDMR_SRST_GETHER = 0x03,
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@@ -505,6 +506,7 @@ struct sh_eth_cpu_data {
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unsigned bculr:1; /* EtherC have BCULR */
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unsigned bculr:1; /* EtherC have BCULR */
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unsigned tsu:1; /* EtherC have TSU */
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unsigned tsu:1; /* EtherC have TSU */
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unsigned hw_swap:1; /* E-DMAC have DE bit in EDMR */
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unsigned hw_swap:1; /* E-DMAC have DE bit in EDMR */
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+ unsigned nbst:1; /* E-DMAC has NBST bit in EDMR */
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unsigned rpadir:1; /* E-DMAC have RPADIR */
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unsigned rpadir:1; /* E-DMAC have RPADIR */
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unsigned no_trimd:1; /* E-DMAC DO NOT have TRIMD */
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unsigned no_trimd:1; /* E-DMAC DO NOT have TRIMD */
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unsigned no_ade:1; /* E-DMAC DO NOT have ADE bit in EESR */
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unsigned no_ade:1; /* E-DMAC DO NOT have ADE bit in EESR */
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