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@@ -311,6 +311,32 @@ error:
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return r;
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return r;
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}
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}
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+static bool amdgpu_vm_ring_has_compute_vm_bug(struct amdgpu_ring *ring)
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+{
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+ struct amdgpu_device *adev = ring->adev;
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+ const struct amdgpu_ip_block_version *ip_block;
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+
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+ if (ring->type != AMDGPU_RING_TYPE_COMPUTE)
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+ /* only compute rings */
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+ return false;
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+
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+ ip_block = amdgpu_get_ip_block(adev, AMD_IP_BLOCK_TYPE_GFX);
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+ if (!ip_block)
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+ return false;
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+
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+ if (ip_block->major <= 7) {
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+ /* gfx7 has no workaround */
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+ return true;
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+ } else if (ip_block->major == 8) {
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+ if (adev->gfx.mec_fw_version >= 673)
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+ /* gfx8 is fixed in MEC firmware 673 */
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+ return false;
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+ else
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+ return true;
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+ }
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+ return false;
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+}
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+
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/**
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/**
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* amdgpu_vm_flush - hardware flush the vm
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* amdgpu_vm_flush - hardware flush the vm
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*
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*
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@@ -339,7 +365,7 @@ int amdgpu_vm_flush(struct amdgpu_ring *ring,
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if (ring->funcs->emit_pipeline_sync && (
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if (ring->funcs->emit_pipeline_sync && (
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pd_addr != AMDGPU_VM_NO_FLUSH || gds_switch_needed ||
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pd_addr != AMDGPU_VM_NO_FLUSH || gds_switch_needed ||
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- ring->type == AMDGPU_RING_TYPE_COMPUTE))
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+ amdgpu_vm_ring_has_compute_vm_bug(ring)))
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amdgpu_ring_emit_pipeline_sync(ring);
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amdgpu_ring_emit_pipeline_sync(ring);
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if (ring->funcs->emit_vm_flush &&
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if (ring->funcs->emit_vm_flush &&
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