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@@ -1395,7 +1395,6 @@ static void ci_thermal_stop_thermal_controller(struct amdgpu_device *adev)
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ci_fan_ctrl_set_default_mode(adev);
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}
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-#if 0
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static int ci_read_smc_soft_register(struct amdgpu_device *adev,
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u16 reg_offset, u32 *value)
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{
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@@ -1405,7 +1404,6 @@ static int ci_read_smc_soft_register(struct amdgpu_device *adev,
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pi->soft_regs_start + reg_offset,
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value, pi->sram_end);
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}
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-#endif
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static int ci_write_smc_soft_register(struct amdgpu_device *adev,
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u16 reg_offset, u32 value)
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@@ -6084,11 +6082,23 @@ ci_dpm_debugfs_print_current_performance_level(struct amdgpu_device *adev,
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struct amdgpu_ps *rps = &pi->current_rps;
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u32 sclk = ci_get_average_sclk_freq(adev);
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u32 mclk = ci_get_average_mclk_freq(adev);
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+ u32 activity_percent = 50;
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+ int ret;
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+
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+ ret = ci_read_smc_soft_register(adev, offsetof(SMU7_SoftRegisters, AverageGraphicsA),
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+ &activity_percent);
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+
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+ if (ret == 0) {
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+ activity_percent += 0x80;
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+ activity_percent >>= 8;
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+ activity_percent = activity_percent > 100 ? 100 : activity_percent;
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+ }
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seq_printf(m, "uvd %sabled\n", pi->uvd_enabled ? "en" : "dis");
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seq_printf(m, "vce %sabled\n", rps->vce_active ? "en" : "dis");
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seq_printf(m, "power level avg sclk: %u mclk: %u\n",
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sclk, mclk);
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+ seq_printf(m, "GPU load: %u %%\n", activity_percent);
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}
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static void ci_dpm_print_power_state(struct amdgpu_device *adev,
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