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@@ -48,6 +48,23 @@
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#define RTL8366RB_SSCR2 0x0004
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#define RTL8366RB_SSCR2_DROP_UNKNOWN_DA BIT(0)
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+/* Port Mode Control registers */
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+#define RTL8366RB_PMC0 0x0005
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+#define RTL8366RB_PMC0_SPI BIT(0)
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+#define RTL8366RB_PMC0_EN_AUTOLOAD BIT(1)
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+#define RTL8366RB_PMC0_PROBE BIT(2)
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+#define RTL8366RB_PMC0_DIS_BISR BIT(3)
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+#define RTL8366RB_PMC0_ADCTEST BIT(4)
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+#define RTL8366RB_PMC0_SRAM_DIAG BIT(5)
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+#define RTL8366RB_PMC0_EN_SCAN BIT(6)
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+#define RTL8366RB_PMC0_P4_IOMODE_SHIFT 7
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+#define RTL8366RB_PMC0_P4_IOMODE_MASK GENMASK(9, 7)
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+#define RTL8366RB_PMC0_P5_IOMODE_SHIFT 10
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+#define RTL8366RB_PMC0_P5_IOMODE_MASK GENMASK(12, 10)
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+#define RTL8366RB_PMC0_SDSMODE_SHIFT 13
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+#define RTL8366RB_PMC0_SDSMODE_MASK GENMASK(15, 13)
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+#define RTL8366RB_PMC1 0x0006
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+
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/* Port Mirror Control Register */
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#define RTL8366RB_PMCR 0x0007
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#define RTL8366RB_PMCR_SOURCE_PORT(a) (a)
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@@ -860,6 +877,19 @@ static int rtl8366rb_setup(struct dsa_switch *ds)
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if (ret)
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return ret;
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+ /* Port 4 setup: this enables Port 4, usually the WAN port,
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+ * common PHY IO mode is apparently mode 0, and this is not what
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+ * the port is initialized to. There is no explanation of the
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+ * IO modes in the Realtek source code, if your WAN port is
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+ * connected to something exotic such as fiber, then this might
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+ * be worth experimenting with.
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+ */
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+ ret = regmap_update_bits(smi->map, RTL8366RB_PMC0,
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+ RTL8366RB_PMC0_P4_IOMODE_MASK,
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+ 0 << RTL8366RB_PMC0_P4_IOMODE_SHIFT);
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+ if (ret)
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+ return ret;
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+
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/* Discard VLAN tagged packets if the port is not a member of
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* the VLAN with which the packets is associated.
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*/
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