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@@ -178,6 +178,14 @@ static int sprd_pmic_eic_irq_set_type(struct irq_data *data,
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case IRQ_TYPE_LEVEL_LOW:
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pmic_eic->reg[REG_IEV] = 0;
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break;
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+ case IRQ_TYPE_EDGE_RISING:
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+ case IRQ_TYPE_EDGE_FALLING:
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+ case IRQ_TYPE_EDGE_BOTH:
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+ /*
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+ * Will set the trigger level according to current EIC level
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+ * in irq_bus_sync_unlock() interface, so here nothing to do.
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+ */
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+ break;
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default:
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return -ENOTSUPP;
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}
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@@ -197,11 +205,22 @@ static void sprd_pmic_eic_bus_sync_unlock(struct irq_data *data)
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{
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struct gpio_chip *chip = irq_data_get_irq_chip_data(data);
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struct sprd_pmic_eic *pmic_eic = gpiochip_get_data(chip);
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+ u32 trigger = irqd_get_trigger_type(data);
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u32 offset = irqd_to_hwirq(data);
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+ int state;
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/* Set irq type */
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- sprd_pmic_eic_update(chip, offset, SPRD_PMIC_EIC_IEV,
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- pmic_eic->reg[REG_IEV]);
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+ if (trigger & IRQ_TYPE_EDGE_BOTH) {
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+ state = sprd_pmic_eic_get(chip, offset);
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+ if (state)
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+ sprd_pmic_eic_update(chip, offset, SPRD_PMIC_EIC_IEV, 0);
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+ else
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+ sprd_pmic_eic_update(chip, offset, SPRD_PMIC_EIC_IEV, 1);
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+ } else {
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+ sprd_pmic_eic_update(chip, offset, SPRD_PMIC_EIC_IEV,
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+ pmic_eic->reg[REG_IEV]);
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+ }
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+
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/* Set irq unmask */
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sprd_pmic_eic_update(chip, offset, SPRD_PMIC_EIC_IE,
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pmic_eic->reg[REG_IE]);
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@@ -212,6 +231,35 @@ static void sprd_pmic_eic_bus_sync_unlock(struct irq_data *data)
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mutex_unlock(&pmic_eic->buslock);
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}
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+static void sprd_pmic_eic_toggle_trigger(struct gpio_chip *chip,
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+ unsigned int irq, unsigned int offset)
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+{
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+ u32 trigger = irq_get_trigger_type(irq);
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+ int state, post_state;
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+
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+ if (!(trigger & IRQ_TYPE_EDGE_BOTH))
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+ return;
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+
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+ state = sprd_pmic_eic_get(chip, offset);
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+retry:
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+ if (state)
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+ sprd_pmic_eic_update(chip, offset, SPRD_PMIC_EIC_IEV, 0);
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+ else
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+ sprd_pmic_eic_update(chip, offset, SPRD_PMIC_EIC_IEV, 1);
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+
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+ post_state = sprd_pmic_eic_get(chip, offset);
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+ if (state != post_state) {
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+ dev_warn(chip->parent, "PMIC EIC level was changed.\n");
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+ state = post_state;
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+ goto retry;
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+ }
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+
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+ /* Set irq unmask */
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+ sprd_pmic_eic_update(chip, offset, SPRD_PMIC_EIC_IE, 1);
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+ /* Generate trigger start pulse for debounce EIC */
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+ sprd_pmic_eic_update(chip, offset, SPRD_PMIC_EIC_TRIG, 1);
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+}
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+
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static irqreturn_t sprd_pmic_eic_irq_handler(int irq, void *data)
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{
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struct sprd_pmic_eic *pmic_eic = data;
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@@ -233,6 +281,12 @@ static irqreturn_t sprd_pmic_eic_irq_handler(int irq, void *data)
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girq = irq_find_mapping(chip->irq.domain, n);
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handle_nested_irq(girq);
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+
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+ /*
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+ * The PMIC EIC can only support level trigger, so we can
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+ * toggle the level trigger to emulate the edge trigger.
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+ */
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+ sprd_pmic_eic_toggle_trigger(chip, girq, n);
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}
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return IRQ_HANDLED;
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