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@@ -17,6 +17,117 @@
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#include <asm/preempt.h>
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#include <asm/preempt.h>
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+/*
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+ * We put the hardirq and softirq counter into the preemption
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+ * counter. The bitmask has the following meaning:
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+ *
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+ * - bits 0-7 are the preemption count (max preemption depth: 256)
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+ * - bits 8-15 are the softirq count (max # of softirqs: 256)
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+ *
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+ * The hardirq count could in theory be the same as the number of
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+ * interrupts in the system, but we run all interrupt handlers with
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+ * interrupts disabled, so we cannot have nesting interrupts. Though
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+ * there are a few palaeontologic drivers which reenable interrupts in
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+ * the handler, so we need more than one bit here.
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+ *
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+ * PREEMPT_MASK: 0x000000ff
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+ * SOFTIRQ_MASK: 0x0000ff00
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+ * HARDIRQ_MASK: 0x000f0000
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+ * NMI_MASK: 0x00100000
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+ * PREEMPT_ACTIVE: 0x00200000
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+ */
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+#define PREEMPT_BITS 8
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+#define SOFTIRQ_BITS 8
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+#define HARDIRQ_BITS 4
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+#define NMI_BITS 1
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+
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+#define PREEMPT_SHIFT 0
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+#define SOFTIRQ_SHIFT (PREEMPT_SHIFT + PREEMPT_BITS)
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+#define HARDIRQ_SHIFT (SOFTIRQ_SHIFT + SOFTIRQ_BITS)
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+#define NMI_SHIFT (HARDIRQ_SHIFT + HARDIRQ_BITS)
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+
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+#define __IRQ_MASK(x) ((1UL << (x))-1)
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+
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+#define PREEMPT_MASK (__IRQ_MASK(PREEMPT_BITS) << PREEMPT_SHIFT)
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+#define SOFTIRQ_MASK (__IRQ_MASK(SOFTIRQ_BITS) << SOFTIRQ_SHIFT)
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+#define HARDIRQ_MASK (__IRQ_MASK(HARDIRQ_BITS) << HARDIRQ_SHIFT)
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+#define NMI_MASK (__IRQ_MASK(NMI_BITS) << NMI_SHIFT)
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+
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+#define PREEMPT_OFFSET (1UL << PREEMPT_SHIFT)
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+#define SOFTIRQ_OFFSET (1UL << SOFTIRQ_SHIFT)
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+#define HARDIRQ_OFFSET (1UL << HARDIRQ_SHIFT)
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+#define NMI_OFFSET (1UL << NMI_SHIFT)
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+
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+#define SOFTIRQ_DISABLE_OFFSET (2 * SOFTIRQ_OFFSET)
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+
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+#define PREEMPT_ACTIVE_BITS 1
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+#define PREEMPT_ACTIVE_SHIFT (NMI_SHIFT + NMI_BITS)
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+#define PREEMPT_ACTIVE (__IRQ_MASK(PREEMPT_ACTIVE_BITS) << PREEMPT_ACTIVE_SHIFT)
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+
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+#define hardirq_count() (preempt_count() & HARDIRQ_MASK)
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+#define softirq_count() (preempt_count() & SOFTIRQ_MASK)
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+#define irq_count() (preempt_count() & (HARDIRQ_MASK | SOFTIRQ_MASK \
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+ | NMI_MASK))
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+
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+/*
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+ * Are we doing bottom half or hardware interrupt processing?
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+ * Are we in a softirq context? Interrupt context?
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+ * in_softirq - Are we currently processing softirq or have bh disabled?
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+ * in_serving_softirq - Are we currently processing softirq?
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+ */
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+#define in_irq() (hardirq_count())
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+#define in_softirq() (softirq_count())
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+#define in_interrupt() (irq_count())
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+#define in_serving_softirq() (softirq_count() & SOFTIRQ_OFFSET)
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+
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+/*
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+ * Are we in NMI context?
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+ */
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+#define in_nmi() (preempt_count() & NMI_MASK)
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+
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+#if defined(CONFIG_PREEMPT_COUNT)
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+# define PREEMPT_CHECK_OFFSET 1
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+#else
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+# define PREEMPT_CHECK_OFFSET 0
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+#endif
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+
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+/*
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+ * The preempt_count offset needed for things like:
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+ *
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+ * spin_lock_bh()
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+ *
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+ * Which need to disable both preemption (CONFIG_PREEMPT_COUNT) and
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+ * softirqs, such that unlock sequences of:
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+ *
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+ * spin_unlock();
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+ * local_bh_enable();
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+ *
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+ * Work as expected.
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+ */
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+#define SOFTIRQ_LOCK_OFFSET (SOFTIRQ_DISABLE_OFFSET + PREEMPT_CHECK_OFFSET)
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+
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+/*
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+ * Are we running in atomic context? WARNING: this macro cannot
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+ * always detect atomic context; in particular, it cannot know about
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+ * held spinlocks in non-preemptible kernels. Thus it should not be
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+ * used in the general case to determine whether sleeping is possible.
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+ * Do not use in_atomic() in driver code.
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+ */
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+#define in_atomic() ((preempt_count() & ~PREEMPT_ACTIVE) != 0)
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+
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+/*
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+ * Check whether we were atomic before we did preempt_disable():
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+ * (used by the scheduler, *after* releasing the kernel lock)
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+ */
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+#define in_atomic_preempt_off() \
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+ ((preempt_count() & ~PREEMPT_ACTIVE) != PREEMPT_CHECK_OFFSET)
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+
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+#ifdef CONFIG_PREEMPT_COUNT
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+# define preemptible() (preempt_count() == 0 && !irqs_disabled())
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+#else
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+# define preemptible() 0
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+#endif
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+
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#if defined(CONFIG_DEBUG_PREEMPT) || defined(CONFIG_PREEMPT_TRACER)
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#if defined(CONFIG_DEBUG_PREEMPT) || defined(CONFIG_PREEMPT_TRACER)
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extern void preempt_count_add(int val);
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extern void preempt_count_add(int val);
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extern void preempt_count_sub(int val);
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extern void preempt_count_sub(int val);
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