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@@ -312,6 +312,15 @@ static u32 esdhc_readl_le(struct sdhci_host *host, int reg)
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if (imx_data->socdata->flags & ESDHC_FLAG_HS400)
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val |= SDHCI_SUPPORT_HS400;
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+
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+ /*
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+ * Do not advertise faster UHS modes if there are no
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+ * pinctrl states for 100MHz/200MHz.
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+ */
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+ if (IS_ERR_OR_NULL(imx_data->pins_100mhz) ||
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+ IS_ERR_OR_NULL(imx_data->pins_200mhz))
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+ val &= ~(SDHCI_SUPPORT_SDR50 | SDHCI_SUPPORT_DDR50
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+ | SDHCI_SUPPORT_SDR104 | SDHCI_SUPPORT_HS400);
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}
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}
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@@ -1158,18 +1167,6 @@ sdhci_esdhc_imx_probe_dt(struct platform_device *pdev,
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ESDHC_PINCTRL_STATE_100MHZ);
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imx_data->pins_200mhz = pinctrl_lookup_state(imx_data->pinctrl,
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ESDHC_PINCTRL_STATE_200MHZ);
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- if (IS_ERR(imx_data->pins_100mhz) ||
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- IS_ERR(imx_data->pins_200mhz)) {
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- dev_warn(mmc_dev(host->mmc),
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- "could not get ultra high speed state, work on normal mode\n");
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- /*
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- * fall back to not supporting uhs by specifying no
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- * 1.8v quirk
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- */
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- host->quirks2 |= SDHCI_QUIRK2_NO_1_8_V;
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- }
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- } else {
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- host->quirks2 |= SDHCI_QUIRK2_NO_1_8_V;
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}
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/* call to generic mmc_of_parse to support additional capabilities */
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