|
@@ -50,8 +50,8 @@
|
|
stp x29, lr, [x3, #80]
|
|
stp x29, lr, [x3, #80]
|
|
|
|
|
|
mrs x19, sp_el0
|
|
mrs x19, sp_el0
|
|
- mrs x20, elr_el2 // EL1 PC
|
|
|
|
- mrs x21, spsr_el2 // EL1 pstate
|
|
|
|
|
|
+ mrs x20, elr_el2 // pc before entering el2
|
|
|
|
+ mrs x21, spsr_el2 // pstate before entering el2
|
|
|
|
|
|
stp x19, x20, [x3, #96]
|
|
stp x19, x20, [x3, #96]
|
|
str x21, [x3, #112]
|
|
str x21, [x3, #112]
|
|
@@ -82,8 +82,8 @@
|
|
ldr x21, [x3, #16]
|
|
ldr x21, [x3, #16]
|
|
|
|
|
|
msr sp_el0, x19
|
|
msr sp_el0, x19
|
|
- msr elr_el2, x20 // EL1 PC
|
|
|
|
- msr spsr_el2, x21 // EL1 pstate
|
|
|
|
|
|
+ msr elr_el2, x20 // pc on return from el2
|
|
|
|
+ msr spsr_el2, x21 // pstate on return from el2
|
|
|
|
|
|
add x3, x2, #CPU_XREG_OFFSET(19)
|
|
add x3, x2, #CPU_XREG_OFFSET(19)
|
|
ldp x19, x20, [x3]
|
|
ldp x19, x20, [x3]
|