|
@@ -23,6 +23,9 @@ EVENT(PM_BR_MPRED_CMPL, 0x400f6)
|
|
|
EVENT(PM_LD_REF_L1, 0x100fc)
|
|
|
/* Load Missed L1 */
|
|
|
EVENT(PM_LD_MISS_L1_FIN, 0x2c04e)
|
|
|
+EVENT(PM_LD_MISS_L1, 0x3e054)
|
|
|
+/* Alternate event code for PM_LD_MISS_L1 */
|
|
|
+EVENT(PM_LD_MISS_L1_ALT, 0x400f0)
|
|
|
/* Store Missed L1 */
|
|
|
EVENT(PM_ST_MISS_L1, 0x300f0)
|
|
|
/* L1 cache data prefetches */
|
|
@@ -62,3 +65,7 @@ EVENT(PM_INST_DISP, 0x200f2)
|
|
|
EVENT(PM_INST_DISP_ALT, 0x300f2)
|
|
|
/* Alternate Branch event code */
|
|
|
EVENT(PM_BR_CMPL_ALT, 0x10012)
|
|
|
+/* Branch event that are not strongly biased */
|
|
|
+EVENT(PM_BR_2PATH, 0x20036)
|
|
|
+/* ALternate branch event that are not strongly biased */
|
|
|
+EVENT(PM_BR_2PATH_ALT, 0x40036)
|