|
@@ -68,13 +68,46 @@
|
|
|
|
|
|
/* Power Management Commands, Responses, Notifications */
|
|
|
|
|
|
+/**
|
|
|
+ * enum iwl_ltr_config_flags - masks for LTR config command flags
|
|
|
+ * @LTR_CFG_FLAG_FEATURE_ENABLE: Feature operational status
|
|
|
+ * @LTR_CFG_FLAG_HW_DIS_ON_SHADOW_REG_ACCESS: allow LTR change on shadow
|
|
|
+ * memory access
|
|
|
+ * @LTR_CFG_FLAG_HW_EN_SHRT_WR_THROUGH: allow LTR msg send on ANY LTR
|
|
|
+ * reg change
|
|
|
+ * @LTR_CFG_FLAG_HW_DIS_ON_D0_2_D3: allow LTR msg send on transition from
|
|
|
+ * D0 to D3
|
|
|
+ * @LTR_CFG_FLAG_SW_SET_SHORT: fixed static short LTR register
|
|
|
+ * @LTR_CFG_FLAG_SW_SET_LONG: fixed static short LONG register
|
|
|
+ * @LTR_CFG_FLAG_DENIE_C10_ON_PD: allow going into C10 on PD
|
|
|
+ */
|
|
|
+enum iwl_ltr_config_flags {
|
|
|
+ LTR_CFG_FLAG_FEATURE_ENABLE = BIT(0),
|
|
|
+ LTR_CFG_FLAG_HW_DIS_ON_SHADOW_REG_ACCESS = BIT(1),
|
|
|
+ LTR_CFG_FLAG_HW_EN_SHRT_WR_THROUGH = BIT(2),
|
|
|
+ LTR_CFG_FLAG_HW_DIS_ON_D0_2_D3 = BIT(3),
|
|
|
+ LTR_CFG_FLAG_SW_SET_SHORT = BIT(4),
|
|
|
+ LTR_CFG_FLAG_SW_SET_LONG = BIT(5),
|
|
|
+ LTR_CFG_FLAG_DENIE_C10_ON_PD = BIT(6),
|
|
|
+};
|
|
|
+
|
|
|
+/**
|
|
|
+ * struct iwl_ltr_config_cmd - configures the LTR
|
|
|
+ * @flags: See %enum iwl_ltr_config_flags
|
|
|
+ */
|
|
|
+struct iwl_ltr_config_cmd {
|
|
|
+ __le32 flags;
|
|
|
+ __le32 static_long;
|
|
|
+ __le32 static_short;
|
|
|
+} __packed;
|
|
|
+
|
|
|
/* Radio LP RX Energy Threshold measured in dBm */
|
|
|
#define POWER_LPRX_RSSI_THRESHOLD 75
|
|
|
#define POWER_LPRX_RSSI_THRESHOLD_MAX 94
|
|
|
#define POWER_LPRX_RSSI_THRESHOLD_MIN 30
|
|
|
|
|
|
/**
|
|
|
- * enum iwl_scan_flags - masks for power table command flags
|
|
|
+ * enum iwl_power_flags - masks for power table command flags
|
|
|
* @POWER_FLAGS_POWER_SAVE_ENA_MSK: '1' Allow to save power by turning off
|
|
|
* receiver and transmitter. '0' - does not allow.
|
|
|
* @POWER_FLAGS_POWER_MANAGEMENT_ENA_MSK: '0' Driver disables power management,
|