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@@ -1730,16 +1730,11 @@ static int amdgpu_device_ip_late_set_cg_state(struct amdgpu_device *adev)
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}
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}
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- if (adev->powerplay.pp_feature & PP_GFXOFF_MASK) {
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+ if (adev->powerplay.pp_feature & PP_GFXOFF_MASK)
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/* enable gfx powergating */
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amdgpu_device_ip_set_powergating_state(adev,
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AMD_IP_BLOCK_TYPE_GFX,
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AMD_PG_STATE_GATE);
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- /* enable gfxoff */
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- amdgpu_device_ip_set_powergating_state(adev,
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- AMD_IP_BLOCK_TYPE_SMC,
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- AMD_PG_STATE_GATE);
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- }
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return 0;
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}
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@@ -1812,6 +1807,8 @@ static int amdgpu_device_ip_fini(struct amdgpu_device *adev)
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adev->ip_blocks[i].version->funcs->name, r);
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return r;
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}
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+ if (adev->powerplay.pp_funcs->set_powergating_by_smu)
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+ amdgpu_dpm_set_powergating_by_smu(adev, AMD_IP_BLOCK_TYPE_GFX, false);
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r = adev->ip_blocks[i].version->funcs->hw_fini((void *)adev);
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/* XXX handle errors */
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if (r) {
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@@ -1921,12 +1918,6 @@ int amdgpu_device_ip_suspend(struct amdgpu_device *adev)
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if (amdgpu_sriov_vf(adev))
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amdgpu_virt_request_full_gpu(adev, false);
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- /* ungate SMC block powergating */
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- if (adev->powerplay.pp_feature & PP_GFXOFF_MASK)
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- amdgpu_device_ip_set_powergating_state(adev,
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- AMD_IP_BLOCK_TYPE_SMC,
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- AMD_PG_STATE_UNGATE);
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-
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/* ungate SMC block first */
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r = amdgpu_device_ip_set_clockgating_state(adev, AMD_IP_BLOCK_TYPE_SMC,
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AMD_CG_STATE_UNGATE);
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@@ -1934,6 +1925,10 @@ int amdgpu_device_ip_suspend(struct amdgpu_device *adev)
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DRM_ERROR("set_clockgating_state(ungate) SMC failed %d\n", r);
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}
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+ /* call smu to disable gfx off feature first when suspend */
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+ if (adev->powerplay.pp_funcs->set_powergating_by_smu)
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+ amdgpu_dpm_set_powergating_by_smu(adev, AMD_IP_BLOCK_TYPE_GFX, false);
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+
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for (i = adev->num_ip_blocks - 1; i >= 0; i--) {
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if (!adev->ip_blocks[i].status.valid)
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continue;
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