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@@ -40,6 +40,8 @@ static void azx_clear_corbrp(struct hdac_bus *bus)
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*/
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void snd_hdac_bus_init_cmd_io(struct hdac_bus *bus)
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{
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+ WARN_ON_ONCE(!bus->rb.area);
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+
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spin_lock_irq(&bus->reg_lock);
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/* CORB set up */
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bus->corb.addr = bus->rb.addr;
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@@ -383,7 +385,7 @@ void snd_hdac_bus_exit_link_reset(struct hdac_bus *bus)
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EXPORT_SYMBOL_GPL(snd_hdac_bus_exit_link_reset);
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/* reset codec link */
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-static int azx_reset(struct hdac_bus *bus, bool full_reset)
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+int snd_hdac_bus_reset_link(struct hdac_bus *bus, bool full_reset)
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{
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if (!full_reset)
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goto skip_reset;
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@@ -408,7 +410,7 @@ static int azx_reset(struct hdac_bus *bus, bool full_reset)
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skip_reset:
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/* check to see if controller is ready */
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if (!snd_hdac_chip_readb(bus, GCTL)) {
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- dev_dbg(bus->dev, "azx_reset: controller not ready!\n");
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+ dev_dbg(bus->dev, "controller not ready!\n");
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return -EBUSY;
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}
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@@ -423,6 +425,7 @@ static int azx_reset(struct hdac_bus *bus, bool full_reset)
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return 0;
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}
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+EXPORT_SYMBOL_GPL(snd_hdac_bus_reset_link);
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/* enable interrupts */
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static void azx_int_enable(struct hdac_bus *bus)
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@@ -477,15 +480,17 @@ bool snd_hdac_bus_init_chip(struct hdac_bus *bus, bool full_reset)
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return false;
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/* reset controller */
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- azx_reset(bus, full_reset);
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+ snd_hdac_bus_reset_link(bus, full_reset);
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- /* initialize interrupts */
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+ /* clear interrupts */
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azx_int_clear(bus);
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- azx_int_enable(bus);
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/* initialize the codec command I/O */
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snd_hdac_bus_init_cmd_io(bus);
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+ /* enable interrupts after CORB/RIRB buffers are initialized above */
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+ azx_int_enable(bus);
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+
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/* program the position buffer */
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if (bus->use_posbuf && bus->posbuf.addr) {
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snd_hdac_chip_writel(bus, DPLBASE, (u32)bus->posbuf.addr);
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