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@@ -180,9 +180,9 @@ static int __init setup_tcm_bank(u8 type, u8 bank, u8 banks,
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*/
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void __init tcm_init(void)
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{
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- u32 tcm_status = read_cpuid_tcmstatus();
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- u8 dtcm_banks = (tcm_status >> 16) & 0x03;
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- u8 itcm_banks = (tcm_status & 0x03);
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+ u32 tcm_status;
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+ u8 dtcm_banks;
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+ u8 itcm_banks;
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size_t dtcm_code_sz = &__edtcm_data - &__sdtcm_data;
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size_t itcm_code_sz = &__eitcm_text - &__sitcm_text;
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char *start;
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@@ -191,6 +191,22 @@ void __init tcm_init(void)
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int ret;
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int i;
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+ /*
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+ * Prior to ARMv5 there is no TCM, and trying to read the status
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+ * register will hang the processor.
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+ */
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+ if (cpu_architecture() < CPU_ARCH_ARMv5) {
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+ if (dtcm_code_sz || itcm_code_sz)
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+ pr_info("CPU TCM: %u bytes of DTCM and %u bytes of "
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+ "ITCM code compiled in, but no TCM present "
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+ "in pre-v5 CPU\n", dtcm_code_sz, itcm_code_sz);
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+ return;
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+ }
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+
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+ tcm_status = read_cpuid_tcmstatus();
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+ dtcm_banks = (tcm_status >> 16) & 0x03;
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+ itcm_banks = (tcm_status & 0x03);
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+
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/* Values greater than 2 for D/ITCM banks are "reserved" */
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if (dtcm_banks > 2)
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dtcm_banks = 0;
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