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@@ -9,6 +9,7 @@ on the Qualcomm ADSP Hexagon core.
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Definition: must be one of:
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"qcom,msm8974-adsp-pil"
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"qcom,msm8996-adsp-pil"
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+ "qcom,msm8996-slpi-pil"
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- interrupts-extended:
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Usage: required
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@@ -24,13 +25,13 @@ on the Qualcomm ADSP Hexagon core.
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- clocks:
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Usage: required
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Value type: <prop-encoded-array>
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- Definition: reference to the xo clock to be held on behalf of the
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- booting Hexagon core
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+ Definition: reference to the xo clock and optionally aggre2 clock to be
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+ held on behalf of the booting Hexagon core
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- clock-names:
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Usage: required
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Value type: <stringlist>
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- Definition: must be "xo"
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+ Definition: must be "xo" and optionally include "aggre2"
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- cx-supply:
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Usage: required
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@@ -38,6 +39,12 @@ on the Qualcomm ADSP Hexagon core.
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Definition: reference to the regulator to be held on behalf of the
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booting Hexagon core
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+- px-supply:
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+ Usage: required
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+ Value type: <phandle>
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+ Definition: reference to the px regulator to be held on behalf of the
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+ booting Hexagon core
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+
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- memory-region:
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Usage: required
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Value type: <phandle>
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@@ -96,3 +103,31 @@ ADSP, as it is found on MSM8974 boards.
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qcom,smd-edge = <1>;
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};
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};
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+
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+The following example describes the resources needed to boot control the
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+SLPI, as it is found on MSM8996 boards.
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+
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+ slpi {
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+ compatible = "qcom,msm8996-slpi-pil";
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+ interrupts-extended = <&intc 0 390 IRQ_TYPE_EDGE_RISING>,
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+ <&slpi_smp2p_in 0 IRQ_TYPE_EDGE_RISING>,
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+ <&slpi_smp2p_in 1 IRQ_TYPE_EDGE_RISING>,
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+ <&slpi_smp2p_in 2 IRQ_TYPE_EDGE_RISING>,
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+ <&slpi_smp2p_in 3 IRQ_TYPE_EDGE_RISING>;
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+ interrupt-names = "wdog",
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+ "fatal",
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+ "ready",
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+ "handover",
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+ "stop-ack";
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+
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+ clocks = <&rpmcc MSM8996_RPM_SMD_XO_CLK_SRC>,
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+ <&rpmcc MSM8996_RPM_SMD_AGGR2_NOC_CLK>;
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+ clock-names = "xo", "aggre2";
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+
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+ cx-supply = <&pm8994_l26>;
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+ px-supply = <&pm8994_lvs2>;
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+
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+ memory-region = <&slpi_region>;
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+ qcom,smem-states = <&slpi_smp2p_out 0>;
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+ qcom,smem-state-names = "stop";
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+ };
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