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@@ -1244,20 +1244,23 @@ mwifiex_cmd_pcie_host_spec(struct mwifiex_private *priv,
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return 0;
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/* Send the ring base addresses and count to firmware */
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- host_spec->txbd_addr_lo = (u32)(card->txbd_ring_pbase);
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- host_spec->txbd_addr_hi = (u32)(((u64)card->txbd_ring_pbase)>>32);
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- host_spec->txbd_count = MWIFIEX_MAX_TXRX_BD;
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- host_spec->rxbd_addr_lo = (u32)(card->rxbd_ring_pbase);
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- host_spec->rxbd_addr_hi = (u32)(((u64)card->rxbd_ring_pbase)>>32);
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- host_spec->rxbd_count = MWIFIEX_MAX_TXRX_BD;
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- host_spec->evtbd_addr_lo = (u32)(card->evtbd_ring_pbase);
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- host_spec->evtbd_addr_hi = (u32)(((u64)card->evtbd_ring_pbase)>>32);
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- host_spec->evtbd_count = MWIFIEX_MAX_EVT_BD;
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+ host_spec->txbd_addr_lo = cpu_to_le32((u32)(card->txbd_ring_pbase));
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+ host_spec->txbd_addr_hi =
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+ cpu_to_le32((u32)(((u64)card->txbd_ring_pbase) >> 32));
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+ host_spec->txbd_count = cpu_to_le32(MWIFIEX_MAX_TXRX_BD);
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+ host_spec->rxbd_addr_lo = cpu_to_le32((u32)(card->rxbd_ring_pbase));
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+ host_spec->rxbd_addr_hi =
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+ cpu_to_le32((u32)(((u64)card->rxbd_ring_pbase) >> 32));
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+ host_spec->rxbd_count = cpu_to_le32(MWIFIEX_MAX_TXRX_BD);
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+ host_spec->evtbd_addr_lo = cpu_to_le32((u32)(card->evtbd_ring_pbase));
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+ host_spec->evtbd_addr_hi =
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+ cpu_to_le32((u32)(((u64)card->evtbd_ring_pbase) >> 32));
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+ host_spec->evtbd_count = cpu_to_le32(MWIFIEX_MAX_EVT_BD);
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if (card->sleep_cookie_vbase) {
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host_spec->sleep_cookie_addr_lo =
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- (u32)(card->sleep_cookie_pbase);
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- host_spec->sleep_cookie_addr_hi =
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- (u32)(((u64)(card->sleep_cookie_pbase)) >> 32);
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+ cpu_to_le32((u32)(card->sleep_cookie_pbase));
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+ host_spec->sleep_cookie_addr_hi = cpu_to_le32((u32)(((u64)
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+ (card->sleep_cookie_pbase)) >> 32));
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mwifiex_dbg(priv->adapter, INFO,
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"sleep_cook_lo phy addr: 0x%x\n",
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host_spec->sleep_cookie_addr_lo);
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