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drm/i915: always disable irqs in intel_pipe_update_start

This can only fail because of a bug in the code.

Suggested-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Signed-off-by: Maarten Lankhorst <maarten.lankhorst@linux.intel.com>
[danvet: Squash in follow-up to also remove start_vbl_count from
intel_crtc->atomic and put it into the intel_crtc directly - it's not
precomputed state.]
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Maarten Lankhorst 10 年之前
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共有 3 个文件被更改,包括 14 次插入25 次删除
  1. 5 10
      drivers/gpu/drm/i915/intel_display.c
  2. 2 5
      drivers/gpu/drm/i915/intel_drv.h
  3. 7 10
      drivers/gpu/drm/i915/intel_sprite.c

+ 5 - 10
drivers/gpu/drm/i915/intel_display.c

@@ -11247,12 +11247,11 @@ static void ilk_do_mmio_flip(struct intel_crtc *intel_crtc)
 static void intel_do_mmio_flip(struct intel_crtc *intel_crtc)
 static void intel_do_mmio_flip(struct intel_crtc *intel_crtc)
 {
 {
 	struct drm_device *dev = intel_crtc->base.dev;
 	struct drm_device *dev = intel_crtc->base.dev;
-	bool atomic_update;
 	u32 start_vbl_count;
 	u32 start_vbl_count;
 
 
 	intel_mark_page_flip_active(intel_crtc);
 	intel_mark_page_flip_active(intel_crtc);
 
 
-	atomic_update = intel_pipe_update_start(intel_crtc, &start_vbl_count);
+	intel_pipe_update_start(intel_crtc, &start_vbl_count);
 
 
 	if (INTEL_INFO(dev)->gen >= 9)
 	if (INTEL_INFO(dev)->gen >= 9)
 		skl_do_mmio_flip(intel_crtc);
 		skl_do_mmio_flip(intel_crtc);
@@ -11260,8 +11259,7 @@ static void intel_do_mmio_flip(struct intel_crtc *intel_crtc)
 		/* use_mmio_flip() retricts MMIO flips to ilk+ */
 		/* use_mmio_flip() retricts MMIO flips to ilk+ */
 		ilk_do_mmio_flip(intel_crtc);
 		ilk_do_mmio_flip(intel_crtc);
 
 
-	if (atomic_update)
-		intel_pipe_update_end(intel_crtc, start_vbl_count);
+	intel_pipe_update_end(intel_crtc, start_vbl_count);
 }
 }
 
 
 static void intel_mmio_flip_work_func(struct work_struct *work)
 static void intel_mmio_flip_work_func(struct work_struct *work)
@@ -13646,9 +13644,7 @@ static void intel_begin_crtc_commit(struct drm_crtc *crtc)
 
 
 	/* Perform vblank evasion around commit operation */
 	/* Perform vblank evasion around commit operation */
 	if (crtc->state->active)
 	if (crtc->state->active)
-		intel_crtc->atomic.evade =
-			intel_pipe_update_start(intel_crtc,
-						&intel_crtc->atomic.start_vbl_count);
+		intel_pipe_update_start(intel_crtc, &intel_crtc->start_vbl_count);
 
 
 	if (!needs_modeset(crtc->state) && INTEL_INFO(dev)->gen >= 9)
 	if (!needs_modeset(crtc->state) && INTEL_INFO(dev)->gen >= 9)
 		skl_detach_scalers(intel_crtc);
 		skl_detach_scalers(intel_crtc);
@@ -13658,9 +13654,8 @@ static void intel_finish_crtc_commit(struct drm_crtc *crtc)
 {
 {
 	struct intel_crtc *intel_crtc = to_intel_crtc(crtc);
 	struct intel_crtc *intel_crtc = to_intel_crtc(crtc);
 
 
-	if (intel_crtc->atomic.evade)
-		intel_pipe_update_end(intel_crtc,
-				      intel_crtc->atomic.start_vbl_count);
+	if (crtc->state->active)
+		intel_pipe_update_end(intel_crtc, intel_crtc->start_vbl_count);
 }
 }
 
 
 /**
 /**

+ 2 - 5
drivers/gpu/drm/i915/intel_drv.h

@@ -488,10 +488,6 @@ struct skl_pipe_wm {
  * and thus can't be run with interrupts disabled.
  * and thus can't be run with interrupts disabled.
  */
  */
 struct intel_crtc_atomic_commit {
 struct intel_crtc_atomic_commit {
-	/* vblank evasion */
-	bool evade;
-	unsigned start_vbl_count;
-
 	/* Sleepable operations to perform before commit */
 	/* Sleepable operations to perform before commit */
 	bool wait_for_flips;
 	bool wait_for_flips;
 	bool disable_fbc;
 	bool disable_fbc;
@@ -559,6 +555,7 @@ struct intel_crtc {
 
 
 	int scanline_offset;
 	int scanline_offset;
 
 
+	unsigned start_vbl_count;
 	struct intel_crtc_atomic_commit atomic;
 	struct intel_crtc_atomic_commit atomic;
 
 
 	/* scalers available on this crtc */
 	/* scalers available on this crtc */
@@ -1385,7 +1382,7 @@ bool intel_sdvo_init(struct drm_device *dev, uint32_t sdvo_reg, bool is_sdvob);
 int intel_plane_init(struct drm_device *dev, enum pipe pipe, int plane);
 int intel_plane_init(struct drm_device *dev, enum pipe pipe, int plane);
 int intel_sprite_set_colorkey(struct drm_device *dev, void *data,
 int intel_sprite_set_colorkey(struct drm_device *dev, void *data,
 			      struct drm_file *file_priv);
 			      struct drm_file *file_priv);
-bool intel_pipe_update_start(struct intel_crtc *crtc,
+void intel_pipe_update_start(struct intel_crtc *crtc,
 			     uint32_t *start_vbl_count);
 			     uint32_t *start_vbl_count);
 void intel_pipe_update_end(struct intel_crtc *crtc, u32 start_vbl_count);
 void intel_pipe_update_end(struct intel_crtc *crtc, u32 start_vbl_count);
 
 

+ 7 - 10
drivers/gpu/drm/i915/intel_sprite.c

@@ -75,10 +75,8 @@ static int usecs_to_scanlines(const struct drm_display_mode *mode, int usecs)
  * until a subsequent call to intel_pipe_update_end(). That is done to
  * until a subsequent call to intel_pipe_update_end(). That is done to
  * avoid random delays. The value written to @start_vbl_count should be
  * avoid random delays. The value written to @start_vbl_count should be
  * supplied to intel_pipe_update_end() for error checking.
  * supplied to intel_pipe_update_end() for error checking.
- *
- * Return: true if the call was successful
  */
  */
-bool intel_pipe_update_start(struct intel_crtc *crtc, uint32_t *start_vbl_count)
+void intel_pipe_update_start(struct intel_crtc *crtc, uint32_t *start_vbl_count)
 {
 {
 	struct drm_device *dev = crtc->base.dev;
 	struct drm_device *dev = crtc->base.dev;
 	const struct drm_display_mode *mode = &crtc->config->base.adjusted_mode;
 	const struct drm_display_mode *mode = &crtc->config->base.adjusted_mode;
@@ -96,13 +94,14 @@ bool intel_pipe_update_start(struct intel_crtc *crtc, uint32_t *start_vbl_count)
 	min = vblank_start - usecs_to_scanlines(mode, 100);
 	min = vblank_start - usecs_to_scanlines(mode, 100);
 	max = vblank_start - 1;
 	max = vblank_start - 1;
 
 
+	local_irq_disable();
+	*start_vbl_count = 0;
+
 	if (min <= 0 || max <= 0)
 	if (min <= 0 || max <= 0)
-		return false;
+		return;
 
 
 	if (WARN_ON(drm_crtc_vblank_get(&crtc->base)))
 	if (WARN_ON(drm_crtc_vblank_get(&crtc->base)))
-		return false;
-
-	local_irq_disable();
+		return;
 
 
 	trace_i915_pipe_update_start(crtc, min, max);
 	trace_i915_pipe_update_start(crtc, min, max);
 
 
@@ -138,8 +137,6 @@ bool intel_pipe_update_start(struct intel_crtc *crtc, uint32_t *start_vbl_count)
 	*start_vbl_count = dev->driver->get_vblank_counter(dev, pipe);
 	*start_vbl_count = dev->driver->get_vblank_counter(dev, pipe);
 
 
 	trace_i915_pipe_update_vblank_evaded(crtc, min, max, *start_vbl_count);
 	trace_i915_pipe_update_vblank_evaded(crtc, min, max, *start_vbl_count);
-
-	return true;
 }
 }
 
 
 /**
 /**
@@ -161,7 +158,7 @@ void intel_pipe_update_end(struct intel_crtc *crtc, u32 start_vbl_count)
 
 
 	local_irq_enable();
 	local_irq_enable();
 
 
-	if (start_vbl_count != end_vbl_count)
+	if (start_vbl_count && start_vbl_count != end_vbl_count)
 		DRM_ERROR("Atomic update failure on pipe %c (start=%u end=%u)\n",
 		DRM_ERROR("Atomic update failure on pipe %c (start=%u end=%u)\n",
 			  pipe_name(pipe), start_vbl_count, end_vbl_count);
 			  pipe_name(pipe), start_vbl_count, end_vbl_count);
 }
 }