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@@ -331,7 +331,7 @@ static void rtl88eu_dm_hw_ant_div(struct odm_dm_struct *dm_odm)
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dig_table->RSSI_max = max_rssi;
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dig_table->RSSI_max = max_rssi;
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}
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}
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-void ODM_AntennaDiversity_88E(struct odm_dm_struct *dm_odm)
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+void rtl88eu_dm_antenna_diversity(struct odm_dm_struct *dm_odm)
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{
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{
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struct fast_ant_train *dm_fat_tbl = &dm_odm->DM_FatTable;
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struct fast_ant_train *dm_fat_tbl = &dm_odm->DM_FatTable;
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struct adapter *adapter = dm_odm->Adapter;
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struct adapter *adapter = dm_odm->Adapter;
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@@ -339,28 +339,35 @@ void ODM_AntennaDiversity_88E(struct odm_dm_struct *dm_odm)
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if (!(dm_odm->SupportAbility & ODM_BB_ANT_DIV))
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if (!(dm_odm->SupportAbility & ODM_BB_ANT_DIV))
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return;
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return;
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if (!dm_odm->bLinked) {
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if (!dm_odm->bLinked) {
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- ODM_RT_TRACE(dm_odm, ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("ODM_AntennaDiversity_88E(): No Link.\n"));
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+ ODM_RT_TRACE(dm_odm, ODM_COMP_ANT_DIV, ODM_DBG_LOUD,
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+ ("ODM_AntennaDiversity_88E(): No Link.\n"));
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if (dm_fat_tbl->bBecomeLinked) {
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if (dm_fat_tbl->bBecomeLinked) {
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- ODM_RT_TRACE(dm_odm, ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("Need to Turn off HW AntDiv\n"));
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- phy_set_bb_reg(adapter, ODM_REG_IGI_A_11N, BIT7, 0); /* RegC50[7]=1'b1 enable HW AntDiv */
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- phy_set_bb_reg(adapter, ODM_REG_CCK_ANTDIV_PARA1_11N, BIT15, 0); /* Enable CCK AntDiv */
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+ ODM_RT_TRACE(dm_odm, ODM_COMP_ANT_DIV, ODM_DBG_LOUD,
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+ ("Need to Turn off HW AntDiv\n"));
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+ phy_set_bb_reg(adapter, ODM_REG_IGI_A_11N, BIT7, 0);
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+ phy_set_bb_reg(adapter, ODM_REG_CCK_ANTDIV_PARA1_11N,
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+ BIT15, 0);
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if (dm_odm->AntDivType == CG_TRX_HW_ANTDIV)
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if (dm_odm->AntDivType == CG_TRX_HW_ANTDIV)
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- phy_set_bb_reg(adapter, ODM_REG_TX_ANT_CTRL_11N, BIT21, 0); /* Reg80c[21]=1'b0 from TX Reg */
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+ phy_set_bb_reg(adapter, ODM_REG_TX_ANT_CTRL_11N,
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+ BIT21, 0);
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dm_fat_tbl->bBecomeLinked = dm_odm->bLinked;
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dm_fat_tbl->bBecomeLinked = dm_odm->bLinked;
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}
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}
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return;
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return;
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} else {
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} else {
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if (!dm_fat_tbl->bBecomeLinked) {
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if (!dm_fat_tbl->bBecomeLinked) {
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- ODM_RT_TRACE(dm_odm, ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("Need to Turn on HW AntDiv\n"));
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- /* Because HW AntDiv is disabled before Link, we enable HW AntDiv after link */
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- phy_set_bb_reg(adapter, ODM_REG_IGI_A_11N, BIT7, 1); /* RegC50[7]=1'b1 enable HW AntDiv */
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- phy_set_bb_reg(adapter, ODM_REG_CCK_ANTDIV_PARA1_11N, BIT15, 1); /* Enable CCK AntDiv */
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+ ODM_RT_TRACE(dm_odm, ODM_COMP_ANT_DIV, ODM_DBG_LOUD,
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+ ("Need to Turn on HW AntDiv\n"));
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+ phy_set_bb_reg(adapter, ODM_REG_IGI_A_11N, BIT7, 1);
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+ phy_set_bb_reg(adapter, ODM_REG_CCK_ANTDIV_PARA1_11N,
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+ BIT15, 1);
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if (dm_odm->AntDivType == CG_TRX_HW_ANTDIV)
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if (dm_odm->AntDivType == CG_TRX_HW_ANTDIV)
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- phy_set_bb_reg(adapter, ODM_REG_TX_ANT_CTRL_11N, BIT21, 1); /* Reg80c[21]=1'b1 from TX Info */
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+ phy_set_bb_reg(adapter, ODM_REG_TX_ANT_CTRL_11N,
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+ BIT21, 1);
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dm_fat_tbl->bBecomeLinked = dm_odm->bLinked;
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dm_fat_tbl->bBecomeLinked = dm_odm->bLinked;
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}
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}
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}
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}
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- if ((dm_odm->AntDivType == CG_TRX_HW_ANTDIV) || (dm_odm->AntDivType == CGCS_RX_HW_ANTDIV))
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+ if ((dm_odm->AntDivType == CG_TRX_HW_ANTDIV) ||
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+ (dm_odm->AntDivType == CGCS_RX_HW_ANTDIV))
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rtl88eu_dm_hw_ant_div(dm_odm);
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rtl88eu_dm_hw_ant_div(dm_odm);
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}
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}
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