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@@ -499,7 +499,9 @@ enum i40e_rx_desc_status_bits {
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I40E_RX_DESC_STATUS_FLM_SHIFT = 11,
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I40E_RX_DESC_STATUS_FLTSTAT_SHIFT = 12, /* 2 BITS */
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I40E_RX_DESC_STATUS_LPBK_SHIFT = 14,
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- I40E_RX_DESC_STATUS_UDP_0_SHIFT = 16
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+ I40E_RX_DESC_STATUS_IPV6EXADD_SHIFT = 15,
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+ I40E_RX_DESC_STATUS_RESERVED_SHIFT = 16, /* 2 BITS */
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+ I40E_RX_DESC_STATUS_UDP_0_SHIFT = 18
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};
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#define I40E_RXD_QW1_STATUS_TSYNINDX_SHIFT I40E_RX_DESC_STATUS_TSYNINDX_SHIFT
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