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@@ -1683,17 +1683,6 @@ static int hsw_mm_switch(struct i915_hw_ppgtt *ppgtt,
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return 0;
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}
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-static int vgpu_mm_switch(struct i915_hw_ppgtt *ppgtt,
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- struct drm_i915_gem_request *req)
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-{
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- struct intel_engine_cs *engine = req->engine;
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- struct drm_i915_private *dev_priv = to_i915(ppgtt->base.dev);
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-
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- I915_WRITE(RING_PP_DIR_DCLV(engine), PP_DIR_DCLV_2G);
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- I915_WRITE(RING_PP_DIR_BASE(engine), get_pd_offset(ppgtt));
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- return 0;
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-}
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-
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static int gen7_mm_switch(struct i915_hw_ppgtt *ppgtt,
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struct drm_i915_gem_request *req)
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{
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@@ -1731,15 +1720,10 @@ static int gen6_mm_switch(struct i915_hw_ppgtt *ppgtt,
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struct drm_i915_gem_request *req)
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{
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struct intel_engine_cs *engine = req->engine;
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- struct drm_device *dev = ppgtt->base.dev;
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- struct drm_i915_private *dev_priv = to_i915(dev);
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-
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+ struct drm_i915_private *dev_priv = req->i915;
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I915_WRITE(RING_PP_DIR_DCLV(engine), PP_DIR_DCLV_2G);
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I915_WRITE(RING_PP_DIR_BASE(engine), get_pd_offset(ppgtt));
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-
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- POSTING_READ(RING_PP_DIR_DCLV(engine));
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-
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return 0;
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}
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@@ -2074,18 +2058,15 @@ static int gen6_ppgtt_init(struct i915_hw_ppgtt *ppgtt)
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int ret;
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ppgtt->base.pte_encode = ggtt->base.pte_encode;
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- if (IS_GEN6(dev)) {
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+ if (intel_vgpu_active(dev_priv) || IS_GEN6(dev))
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ppgtt->switch_mm = gen6_mm_switch;
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- } else if (IS_HASWELL(dev)) {
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+ else if (IS_HASWELL(dev))
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ppgtt->switch_mm = hsw_mm_switch;
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- } else if (IS_GEN7(dev)) {
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+ else if (IS_GEN7(dev))
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ppgtt->switch_mm = gen7_mm_switch;
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- } else
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+ else
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BUG();
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- if (intel_vgpu_active(dev_priv))
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- ppgtt->switch_mm = vgpu_mm_switch;
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-
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ret = gen6_ppgtt_alloc(ppgtt);
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if (ret)
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return ret;
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