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@@ -1398,7 +1398,7 @@ static int hws_pga_write(struct intel_vgpu *vgpu, unsigned int offset,
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* update the VM CSB status correctly. Here listed registers can
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* support BDW, SKL or other platforms with same HWSP registers.
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*/
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- if (unlikely(ring_id < 0 || ring_id > I915_NUM_ENGINES)) {
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+ if (unlikely(ring_id < 0 || ring_id >= I915_NUM_ENGINES)) {
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gvt_vgpu_err("VM(%d) access unknown hardware status page register:0x%x\n",
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vgpu->id, offset);
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return -EINVAL;
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@@ -1507,7 +1507,7 @@ static int elsp_mmio_write(struct intel_vgpu *vgpu, unsigned int offset,
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u32 data = *(u32 *)p_data;
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int ret = 0;
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- if (WARN_ON(ring_id < 0 || ring_id > I915_NUM_ENGINES - 1))
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+ if (WARN_ON(ring_id < 0 || ring_id >= I915_NUM_ENGINES))
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return -EINVAL;
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execlist = &vgpu->submission.execlist[ring_id];
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