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@@ -216,7 +216,7 @@ static inline u32 stmmac_rx_dirty(struct stmmac_priv *priv)
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/**
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* stmmac_hw_fix_mac_speed - callback for speed selection
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* @priv: driver private structure
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- * Description: on some platforms (e.g. ST), some HW system configuraton
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+ * Description: on some platforms (e.g. ST), some HW system configuration
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* registers have to be set according to the link speed negotiated.
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*/
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static inline void stmmac_hw_fix_mac_speed(struct stmmac_priv *priv)
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@@ -416,7 +416,7 @@ static void stmmac_get_rx_hwtstamp(struct stmmac_priv *priv, struct dma_desc *p,
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/**
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* stmmac_hwtstamp_ioctl - control hardware timestamping.
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* @dev: device pointer.
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- * @ifr: An IOCTL specefic structure, that can contain a pointer to
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+ * @ifr: An IOCTL specific structure, that can contain a pointer to
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* a proprietary structure used to pass information to the driver.
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* Description:
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* This function configures the MAC to enable/disable both outgoing(TX)
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@@ -1003,7 +1003,7 @@ static void stmmac_free_rx_buffers(struct stmmac_priv *priv, int i)
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* @dev: net device structure
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* @flags: gfp flag.
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* Description: this function initializes the DMA RX/TX descriptors
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- * and allocates the socket buffers. It suppors the chained and ring
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+ * and allocates the socket buffers. It supports the chained and ring
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* modes.
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*/
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static int init_dma_desc_rings(struct net_device *dev, gfp_t flags)
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@@ -2532,7 +2532,7 @@ static int stmmac_rx(struct stmmac_priv *priv, int limit)
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if (unlikely(status == discard_frame)) {
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priv->dev->stats.rx_errors++;
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if (priv->hwts_rx_en && !priv->extend_desc) {
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- /* DESC2 & DESC3 will be overwitten by device
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+ /* DESC2 & DESC3 will be overwritten by device
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* with timestamp value, hence reinitialize
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* them in stmmac_rx_refill() function so that
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* device can reuse it.
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@@ -2555,7 +2555,7 @@ static int stmmac_rx(struct stmmac_priv *priv, int limit)
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frame_len = priv->hw->desc->get_rx_frame_len(p, coe);
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- /* If frame length is greather than skb buffer size
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+ /* If frame length is greater than skb buffer size
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* (preallocated during init) then the packet is
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* ignored
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*/
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@@ -2761,7 +2761,7 @@ static netdev_features_t stmmac_fix_features(struct net_device *dev,
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/* Some GMAC devices have a bugged Jumbo frame support that
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* needs to have the Tx COE disabled for oversized frames
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* (due to limited buffer sizes). In this case we disable
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- * the TX csum insertionin the TDES and not use SF.
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+ * the TX csum insertion in the TDES and not use SF.
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*/
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if (priv->plat->bugged_jumbo && (dev->mtu > ETH_DATA_LEN))
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features &= ~NETIF_F_CSUM_MASK;
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@@ -2988,7 +2988,7 @@ static int stmmac_sysfs_dma_cap_read(struct seq_file *seq, void *v)
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(priv->dma_cap.hash_filter) ? "Y" : "N");
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seq_printf(seq, "\tMultiple MAC address registers: %s\n",
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(priv->dma_cap.multi_addr) ? "Y" : "N");
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- seq_printf(seq, "\tPCS (TBI/SGMII/RTBI PHY interfatces): %s\n",
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+ seq_printf(seq, "\tPCS (TBI/SGMII/RTBI PHY interfaces): %s\n",
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(priv->dma_cap.pcs) ? "Y" : "N");
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seq_printf(seq, "\tSMA (MDIO) Interface: %s\n",
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(priv->dma_cap.sma_mdio) ? "Y" : "N");
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@@ -3485,7 +3485,7 @@ int stmmac_resume(struct device *dev)
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priv->irq_wake = 0;
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} else {
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pinctrl_pm_select_default_state(priv->device);
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- /* enable the clk prevously disabled */
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+ /* enable the clk previously disabled */
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clk_enable(priv->plat->stmmac_clk);
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clk_enable(priv->plat->pclk);
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/* reset the phy so that it's ready */
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