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@@ -737,6 +737,17 @@ static int tegra_output_hdmi_enable(struct tegra_output *output)
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usleep_range(1000, 2000);
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reset_control_deassert(hdmi->rst);
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+ /* power up sequence */
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+ value = tegra_hdmi_readl(hdmi, HDMI_NV_PDISP_SOR_PLL0);
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+ value &= ~SOR_PLL_PDBG;
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+ tegra_hdmi_writel(hdmi, value, HDMI_NV_PDISP_SOR_PLL0);
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+
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+ usleep_range(10, 20);
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+
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+ value = tegra_hdmi_readl(hdmi, HDMI_NV_PDISP_SOR_PLL0);
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+ value &= ~SOR_PLL_PWR;
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+ tegra_hdmi_writel(hdmi, value, HDMI_NV_PDISP_SOR_PLL0);
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+
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tegra_dc_writel(dc, VSYNC_H_POSITION(1),
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DC_DISP_DISP_TIMING_OPTIONS);
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tegra_dc_writel(dc, DITHER_CONTROL_DISABLE | BASE_COLOR_SIZE888,
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