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@@ -508,14 +508,10 @@ bool psp_v3_1_compare_sram_data(struct psp_context *psp,
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bool psp_v3_1_smu_reload_quirk(struct psp_context *psp)
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{
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struct amdgpu_device *adev = psp->adev;
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- uint32_t reg, reg_val;
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+ uint32_t reg;
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- reg_val = (smnMP1_FIRMWARE_FLAGS & 0xffffffff) | 0x03b00000;
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- WREG32(SOC15_REG_OFFSET(NBIO, 0, mmPCIE_INDEX2), reg_val);
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+ reg = smnMP1_FIRMWARE_FLAGS | 0x03b00000;
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+ WREG32(SOC15_REG_OFFSET(NBIO, 0, mmPCIE_INDEX2), reg);
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reg = RREG32(SOC15_REG_OFFSET(NBIO, 0, mmPCIE_DATA2));
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- if ((reg & MP1_FIRMWARE_FLAGS__INTERRUPTS_ENABLED_MASK) >>
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- MP1_FIRMWARE_FLAGS__INTERRUPTS_ENABLED__SHIFT)
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- return true;
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-
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- return false;
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+ return (reg & MP1_FIRMWARE_FLAGS__INTERRUPTS_ENABLED_MASK) ? true : false;
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}
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