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@@ -47,14 +47,14 @@ struct sh_mtu2_device {
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void __iomem *mapbase;
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struct clk *clk;
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+ raw_spinlock_t lock; /* Protect the shared registers */
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+
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struct sh_mtu2_channel *channels;
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unsigned int num_channels;
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bool has_clockevent;
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};
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-static DEFINE_RAW_SPINLOCK(sh_mtu2_lock);
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-
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#define TSTR -1 /* shared register */
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#define TCR 0 /* channel register */
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#define TMDR 1 /* channel register */
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@@ -192,7 +192,7 @@ static void sh_mtu2_start_stop_ch(struct sh_mtu2_channel *ch, int start)
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unsigned long flags, value;
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/* start stop register shared by multiple timer channels */
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- raw_spin_lock_irqsave(&sh_mtu2_lock, flags);
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+ raw_spin_lock_irqsave(&ch->mtu->lock, flags);
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value = sh_mtu2_read(ch, TSTR);
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if (start)
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@@ -201,7 +201,7 @@ static void sh_mtu2_start_stop_ch(struct sh_mtu2_channel *ch, int start)
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value &= ~(1 << ch->index);
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sh_mtu2_write(ch, TSTR, value);
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- raw_spin_unlock_irqrestore(&sh_mtu2_lock, flags);
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+ raw_spin_unlock_irqrestore(&ch->mtu->lock, flags);
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}
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static int sh_mtu2_enable(struct sh_mtu2_channel *ch)
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@@ -402,6 +402,8 @@ static int sh_mtu2_setup(struct sh_mtu2_device *mtu,
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mtu->pdev = pdev;
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+ raw_spin_lock_init(&mtu->lock);
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+
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/* Get hold of clock. */
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mtu->clk = clk_get(&mtu->pdev->dev, "fck");
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if (IS_ERR(mtu->clk)) {
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