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@@ -30,19 +30,13 @@
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/* Slave spi_dev related */
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/* Slave spi_dev related */
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struct chip_data {
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struct chip_data {
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- u16 cr0;
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u8 cs; /* chip select pin */
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u8 cs; /* chip select pin */
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- u8 n_bytes; /* current is a 1/2/4 byte op */
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u8 tmode; /* TR/TO/RO/EEPROM */
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u8 tmode; /* TR/TO/RO/EEPROM */
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u8 type; /* SPI/SSP/MicroWire */
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u8 type; /* SPI/SSP/MicroWire */
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u8 poll_mode; /* 1 means use poll mode */
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u8 poll_mode; /* 1 means use poll mode */
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- u32 dma_width;
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- u32 rx_threshold;
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- u32 tx_threshold;
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u8 enable_dma;
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u8 enable_dma;
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- u8 bits_per_word;
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u16 clk_div; /* baud rate divider */
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u16 clk_div; /* baud rate divider */
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u32 speed_hz; /* baud rate */
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u32 speed_hz; /* baud rate */
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void (*cs_control)(u32 command);
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void (*cs_control)(u32 command);
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@@ -289,14 +283,11 @@ static int dw_spi_transfer_one(struct spi_master *master,
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struct chip_data *chip = spi_get_ctldata(spi);
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struct chip_data *chip = spi_get_ctldata(spi);
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u8 imask = 0;
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u8 imask = 0;
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u16 txlevel = 0;
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u16 txlevel = 0;
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- u16 clk_div = 0;
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- u32 speed = 0;
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- u32 cr0 = 0;
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+ u16 clk_div;
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+ u32 cr0;
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int ret;
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int ret;
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dws->dma_mapped = 0;
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dws->dma_mapped = 0;
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- dws->n_bytes = chip->n_bytes;
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- dws->dma_width = chip->dma_width;
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dws->tx = (void *)transfer->tx_buf;
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dws->tx = (void *)transfer->tx_buf;
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dws->tx_end = dws->tx + transfer->len;
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dws->tx_end = dws->tx + transfer->len;
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@@ -306,37 +297,30 @@ static int dw_spi_transfer_one(struct spi_master *master,
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spi_enable_chip(dws, 0);
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spi_enable_chip(dws, 0);
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- cr0 = chip->cr0;
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-
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/* Handle per transfer options for bpw and speed */
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/* Handle per transfer options for bpw and speed */
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- if (transfer->speed_hz) {
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- speed = chip->speed_hz;
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-
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- if ((transfer->speed_hz != speed) || !chip->clk_div) {
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- speed = transfer->speed_hz;
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-
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- /* clk_div doesn't support odd number */
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- clk_div = (dws->max_freq / speed + 1) & 0xfffe;
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+ if (transfer->speed_hz != chip->speed_hz) {
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+ /* clk_div doesn't support odd number */
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+ clk_div = (dws->max_freq / transfer->speed_hz + 1) & 0xfffe;
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- chip->speed_hz = speed;
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- chip->clk_div = clk_div;
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+ chip->speed_hz = transfer->speed_hz;
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+ chip->clk_div = clk_div;
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- spi_set_clk(dws, chip->clk_div);
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- }
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+ spi_set_clk(dws, chip->clk_div);
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}
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}
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- if (transfer->bits_per_word) {
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- if (transfer->bits_per_word == 8) {
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- dws->n_bytes = 1;
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- dws->dma_width = 1;
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- } else if (transfer->bits_per_word == 16) {
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- dws->n_bytes = 2;
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- dws->dma_width = 2;
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- }
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- cr0 = (transfer->bits_per_word - 1)
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- | (chip->type << SPI_FRF_OFFSET)
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- | (spi->mode << SPI_MODE_OFFSET)
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- | (chip->tmode << SPI_TMOD_OFFSET);
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+ if (transfer->bits_per_word == 8) {
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+ dws->n_bytes = 1;
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+ dws->dma_width = 1;
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+ } else if (transfer->bits_per_word == 16) {
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+ dws->n_bytes = 2;
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+ dws->dma_width = 2;
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+ } else {
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+ return -EINVAL;
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}
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}
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+ /* Default SPI mode is SCPOL = 0, SCPH = 0 */
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+ cr0 = (transfer->bits_per_word - 1)
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+ | (chip->type << SPI_FRF_OFFSET)
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+ | (spi->mode << SPI_MODE_OFFSET)
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+ | (chip->tmode << SPI_TMOD_OFFSET);
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/*
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/*
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* Adjust transfer mode if necessary. Requires platform dependent
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* Adjust transfer mode if necessary. Requires platform dependent
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@@ -439,34 +423,9 @@ static int dw_spi_setup(struct spi_device *spi)
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chip->poll_mode = chip_info->poll_mode;
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chip->poll_mode = chip_info->poll_mode;
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chip->type = chip_info->type;
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chip->type = chip_info->type;
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-
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- chip->rx_threshold = 0;
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- chip->tx_threshold = 0;
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- }
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-
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- if (spi->bits_per_word == 8) {
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- chip->n_bytes = 1;
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- chip->dma_width = 1;
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- } else if (spi->bits_per_word == 16) {
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- chip->n_bytes = 2;
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- chip->dma_width = 2;
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- }
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- chip->bits_per_word = spi->bits_per_word;
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-
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- if (!spi->max_speed_hz) {
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- dev_err(&spi->dev, "No max speed HZ parameter\n");
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- return -EINVAL;
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}
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}
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chip->tmode = 0; /* Tx & Rx */
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chip->tmode = 0; /* Tx & Rx */
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- /* Default SPI mode is SCPOL = 0, SCPH = 0 */
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- chip->cr0 = (chip->bits_per_word - 1)
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- | (chip->type << SPI_FRF_OFFSET)
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- | (spi->mode << SPI_MODE_OFFSET)
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- | (chip->tmode << SPI_TMOD_OFFSET);
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-
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- if (spi->mode & SPI_LOOP)
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- chip->cr0 |= 1 << SPI_SRL_OFFSET;
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if (gpio_is_valid(spi->cs_gpio)) {
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if (gpio_is_valid(spi->cs_gpio)) {
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ret = gpio_direction_output(spi->cs_gpio,
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ret = gpio_direction_output(spi->cs_gpio,
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@@ -524,13 +483,12 @@ int dw_spi_add_host(struct device *dev, struct dw_spi *dws)
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dws->master = master;
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dws->master = master;
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dws->type = SSI_MOTO_SPI;
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dws->type = SSI_MOTO_SPI;
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dws->dma_inited = 0;
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dws->dma_inited = 0;
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- dws->dma_addr = (dma_addr_t)(dws->paddr + 0x60);
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+ dws->dma_addr = (dma_addr_t)(dws->paddr + DW_SPI_DR);
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snprintf(dws->name, sizeof(dws->name), "dw_spi%d", dws->bus_num);
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snprintf(dws->name, sizeof(dws->name), "dw_spi%d", dws->bus_num);
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- ret = devm_request_irq(dev, dws->irq, dw_spi_irq, IRQF_SHARED,
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- dws->name, master);
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+ ret = request_irq(dws->irq, dw_spi_irq, IRQF_SHARED, dws->name, master);
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if (ret < 0) {
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if (ret < 0) {
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- dev_err(&master->dev, "can not get IRQ\n");
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+ dev_err(dev, "can not get IRQ\n");
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goto err_free_master;
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goto err_free_master;
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}
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}
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@@ -573,6 +531,7 @@ err_dma_exit:
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if (dws->dma_ops && dws->dma_ops->dma_exit)
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if (dws->dma_ops && dws->dma_ops->dma_exit)
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dws->dma_ops->dma_exit(dws);
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dws->dma_ops->dma_exit(dws);
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spi_enable_chip(dws, 0);
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spi_enable_chip(dws, 0);
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+ free_irq(dws->irq, master);
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err_free_master:
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err_free_master:
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spi_master_put(master);
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spi_master_put(master);
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return ret;
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return ret;
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@@ -581,28 +540,27 @@ EXPORT_SYMBOL_GPL(dw_spi_add_host);
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void dw_spi_remove_host(struct dw_spi *dws)
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void dw_spi_remove_host(struct dw_spi *dws)
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{
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{
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- if (!dws)
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- return;
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dw_spi_debugfs_remove(dws);
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dw_spi_debugfs_remove(dws);
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if (dws->dma_ops && dws->dma_ops->dma_exit)
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if (dws->dma_ops && dws->dma_ops->dma_exit)
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dws->dma_ops->dma_exit(dws);
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dws->dma_ops->dma_exit(dws);
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- spi_enable_chip(dws, 0);
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- /* Disable clk */
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- spi_set_clk(dws, 0);
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+
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+ spi_shutdown_chip(dws);
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+
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+ free_irq(dws->irq, dws->master);
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}
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}
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EXPORT_SYMBOL_GPL(dw_spi_remove_host);
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EXPORT_SYMBOL_GPL(dw_spi_remove_host);
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int dw_spi_suspend_host(struct dw_spi *dws)
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int dw_spi_suspend_host(struct dw_spi *dws)
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{
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{
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- int ret = 0;
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+ int ret;
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ret = spi_master_suspend(dws->master);
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ret = spi_master_suspend(dws->master);
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if (ret)
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if (ret)
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return ret;
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return ret;
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- spi_enable_chip(dws, 0);
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- spi_set_clk(dws, 0);
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- return ret;
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+
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+ spi_shutdown_chip(dws);
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+ return 0;
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}
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}
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EXPORT_SYMBOL_GPL(dw_spi_suspend_host);
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EXPORT_SYMBOL_GPL(dw_spi_suspend_host);
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