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@@ -7,6 +7,9 @@
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* published by the Free Software Foundation.
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*/
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#include <linux/clk.h>
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+#include <linux/component.h>
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+#include <linux/of_device.h>
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+#include <linux/platform_device.h>
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#include <drm/drmP.h>
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#include <drm/drm_crtc_helper.h>
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#include "armada_crtc.h"
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@@ -332,24 +335,23 @@ static void armada_drm_crtc_commit(struct drm_crtc *crtc)
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static bool armada_drm_crtc_mode_fixup(struct drm_crtc *crtc,
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const struct drm_display_mode *mode, struct drm_display_mode *adj)
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{
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- struct armada_private *priv = crtc->dev->dev_private;
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struct armada_crtc *dcrtc = drm_to_armada_crtc(crtc);
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int ret;
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/* We can't do interlaced modes if we don't have the SPU_ADV_REG */
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- if (!priv->variant->has_spu_adv_reg &&
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+ if (!dcrtc->variant->has_spu_adv_reg &&
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adj->flags & DRM_MODE_FLAG_INTERLACE)
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return false;
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/* Check whether the display mode is possible */
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- ret = priv->variant->crtc_compute_clock(dcrtc, adj, NULL);
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+ ret = dcrtc->variant->compute_clock(dcrtc, adj, NULL);
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if (ret)
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return false;
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return true;
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}
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-void armada_drm_crtc_irq(struct armada_crtc *dcrtc, u32 stat)
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+static void armada_drm_crtc_irq(struct armada_crtc *dcrtc, u32 stat)
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{
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struct armada_vbl_event *e, *n;
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void __iomem *base = dcrtc->base;
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@@ -410,6 +412,27 @@ void armada_drm_crtc_irq(struct armada_crtc *dcrtc, u32 stat)
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}
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}
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+static irqreturn_t armada_drm_irq(int irq, void *arg)
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+{
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+ struct armada_crtc *dcrtc = arg;
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+ u32 v, stat = readl_relaxed(dcrtc->base + LCD_SPU_IRQ_ISR);
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+
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+ /*
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+ * This is rediculous - rather than writing bits to clear, we
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+ * have to set the actual status register value. This is racy.
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+ */
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+ writel_relaxed(0, dcrtc->base + LCD_SPU_IRQ_ISR);
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+
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+ /* Mask out those interrupts we haven't enabled */
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+ v = stat & dcrtc->irq_ena;
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+
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+ if (v & (VSYNC_IRQ|GRA_FRAME_IRQ|DUMB_FRAMEDONE)) {
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+ armada_drm_crtc_irq(dcrtc, stat);
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+ return IRQ_HANDLED;
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+ }
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+ return IRQ_NONE;
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+}
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+
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/* These are locked by dev->vbl_lock */
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void armada_drm_crtc_disable_irq(struct armada_crtc *dcrtc, u32 mask)
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{
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@@ -470,7 +493,6 @@ static int armada_drm_crtc_mode_set(struct drm_crtc *crtc,
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struct drm_display_mode *mode, struct drm_display_mode *adj,
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int x, int y, struct drm_framebuffer *old_fb)
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{
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- struct armada_private *priv = crtc->dev->dev_private;
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struct armada_crtc *dcrtc = drm_to_armada_crtc(crtc);
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struct armada_regs regs[17];
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uint32_t lm, rm, tm, bm, val, sclk;
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@@ -515,7 +537,7 @@ static int armada_drm_crtc_mode_set(struct drm_crtc *crtc,
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}
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/* Now compute the divider for real */
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- priv->variant->crtc_compute_clock(dcrtc, adj, &sclk);
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+ dcrtc->variant->compute_clock(dcrtc, adj, &sclk);
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/* Ensure graphic fifo is enabled */
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armada_reg_queue_mod(regs, i, 0, CFG_PDWN64x66, LCD_SPU_SRAM_PARA1);
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@@ -537,7 +559,7 @@ static int armada_drm_crtc_mode_set(struct drm_crtc *crtc,
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dcrtc->v[1].spu_v_porch = tm << 16 | bm;
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val = adj->crtc_hsync_start;
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dcrtc->v[1].spu_adv_reg = val << 20 | val | ADV_VSYNCOFFEN |
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- priv->variant->spu_adv_reg;
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+ dcrtc->variant->spu_adv_reg;
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if (interlaced) {
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/* Odd interlaced frame */
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@@ -546,7 +568,7 @@ static int armada_drm_crtc_mode_set(struct drm_crtc *crtc,
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dcrtc->v[0].spu_v_porch = dcrtc->v[1].spu_v_porch + 1;
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val = adj->crtc_hsync_start - adj->crtc_htotal / 2;
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dcrtc->v[0].spu_adv_reg = val << 20 | val | ADV_VSYNCOFFEN |
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- priv->variant->spu_adv_reg;
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+ dcrtc->variant->spu_adv_reg;
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} else {
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dcrtc->v[0] = dcrtc->v[1];
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}
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@@ -561,7 +583,7 @@ static int armada_drm_crtc_mode_set(struct drm_crtc *crtc,
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armada_reg_queue_set(regs, i, dcrtc->v[0].spu_v_h_total,
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LCD_SPUT_V_H_TOTAL);
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- if (priv->variant->has_spu_adv_reg) {
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+ if (dcrtc->variant->has_spu_adv_reg) {
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armada_reg_queue_mod(regs, i, dcrtc->v[0].spu_adv_reg,
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ADV_VSYNC_L_OFF | ADV_VSYNC_H_OFF |
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ADV_VSYNCOFFEN, LCD_SPU_ADV_REG);
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@@ -805,12 +827,11 @@ static int armada_drm_crtc_cursor_set(struct drm_crtc *crtc,
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{
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struct drm_device *dev = crtc->dev;
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struct armada_crtc *dcrtc = drm_to_armada_crtc(crtc);
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- struct armada_private *priv = crtc->dev->dev_private;
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struct armada_gem_object *obj = NULL;
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int ret;
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/* If no cursor support, replicate drm's return value */
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- if (!priv->variant->has_spu_adv_reg)
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+ if (!dcrtc->variant->has_spu_adv_reg)
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return -ENXIO;
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if (handle && w > 0 && h > 0) {
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@@ -858,11 +879,10 @@ static int armada_drm_crtc_cursor_move(struct drm_crtc *crtc, int x, int y)
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{
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struct drm_device *dev = crtc->dev;
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struct armada_crtc *dcrtc = drm_to_armada_crtc(crtc);
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- struct armada_private *priv = crtc->dev->dev_private;
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int ret;
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/* If no cursor support, replicate drm's return value */
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- if (!priv->variant->has_spu_adv_reg)
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+ if (!dcrtc->variant->has_spu_adv_reg)
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return -EFAULT;
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mutex_lock(&dev->struct_mutex);
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@@ -888,6 +908,10 @@ static void armada_drm_crtc_destroy(struct drm_crtc *crtc)
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if (!IS_ERR(dcrtc->clk))
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clk_disable_unprepare(dcrtc->clk);
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+ writel_relaxed(0, dcrtc->base + LCD_SPU_IRQ_ENA);
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+
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+ of_node_put(dcrtc->crtc.port);
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+
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kfree(dcrtc);
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}
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@@ -1027,19 +1051,20 @@ static int armada_drm_crtc_create_properties(struct drm_device *dev)
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return 0;
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}
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-int armada_drm_crtc_create(struct drm_device *dev, unsigned num,
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- struct resource *res)
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+int armada_drm_crtc_create(struct drm_device *drm, struct device *dev,
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+ struct resource *res, int irq, const struct armada_variant *variant,
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+ struct device_node *port)
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{
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- struct armada_private *priv = dev->dev_private;
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+ struct armada_private *priv = drm->dev_private;
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struct armada_crtc *dcrtc;
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void __iomem *base;
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int ret;
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- ret = armada_drm_crtc_create_properties(dev);
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+ ret = armada_drm_crtc_create_properties(drm);
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if (ret)
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return ret;
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- base = devm_request_and_ioremap(dev->dev, res);
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+ base = devm_request_and_ioremap(dev, res);
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if (!base) {
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DRM_ERROR("failed to ioremap register\n");
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return -ENOMEM;
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@@ -1051,8 +1076,12 @@ int armada_drm_crtc_create(struct drm_device *dev, unsigned num,
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return -ENOMEM;
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}
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+ if (dev != drm->dev)
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+ dev_set_drvdata(dev, dcrtc);
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+
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+ dcrtc->variant = variant;
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dcrtc->base = base;
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- dcrtc->num = num;
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+ dcrtc->num = drm->mode_config.num_crtc;
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dcrtc->clk = ERR_PTR(-EINVAL);
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dcrtc->csc_yuv_mode = CSC_AUTO;
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dcrtc->csc_rgb_mode = CSC_AUTO;
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@@ -1074,9 +1103,18 @@ int armada_drm_crtc_create(struct drm_device *dev, unsigned num,
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CFG_PDWN64x66, dcrtc->base + LCD_SPU_SRAM_PARA1);
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writel_relaxed(0x2032ff81, dcrtc->base + LCD_SPU_DMA_CTRL1);
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writel_relaxed(0x00000000, dcrtc->base + LCD_SPU_GRA_OVSA_HPXL_VLN);
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+ writel_relaxed(dcrtc->irq_ena, dcrtc->base + LCD_SPU_IRQ_ENA);
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+ writel_relaxed(0, dcrtc->base + LCD_SPU_IRQ_ISR);
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+
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+ ret = devm_request_irq(dev, irq, armada_drm_irq, 0, "armada_drm_crtc",
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+ dcrtc);
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+ if (ret < 0) {
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+ kfree(dcrtc);
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+ return ret;
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+ }
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- if (priv->variant->crtc_init) {
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- ret = priv->variant->crtc_init(dcrtc);
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+ if (dcrtc->variant->init) {
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+ ret = dcrtc->variant->init(dcrtc, dev);
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if (ret) {
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kfree(dcrtc);
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return ret;
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@@ -1088,7 +1126,8 @@ int armada_drm_crtc_create(struct drm_device *dev, unsigned num,
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priv->dcrtc[dcrtc->num] = dcrtc;
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- drm_crtc_init(dev, &dcrtc->crtc, &armada_crtc_funcs);
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+ dcrtc->crtc.port = port;
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+ drm_crtc_init(drm, &dcrtc->crtc, &armada_crtc_funcs);
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drm_crtc_helper_add(&dcrtc->crtc, &armada_crtc_helper_funcs);
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drm_object_attach_property(&dcrtc->crtc.base, priv->csc_yuv_prop,
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@@ -1096,5 +1135,107 @@ int armada_drm_crtc_create(struct drm_device *dev, unsigned num,
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drm_object_attach_property(&dcrtc->crtc.base, priv->csc_rgb_prop,
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dcrtc->csc_rgb_mode);
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- return armada_overlay_plane_create(dev, 1 << dcrtc->num);
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+ return armada_overlay_plane_create(drm, 1 << dcrtc->num);
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+}
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+
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+static int
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+armada_lcd_bind(struct device *dev, struct device *master, void *data)
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+{
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+ struct platform_device *pdev = to_platform_device(dev);
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+ struct drm_device *drm = data;
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+ struct resource *res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
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+ int irq = platform_get_irq(pdev, 0);
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+ const struct armada_variant *variant;
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+ struct device_node *port = NULL;
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+
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+ if (irq < 0)
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+ return irq;
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+
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+ if (!dev->of_node) {
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+ const struct platform_device_id *id;
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+
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+ id = platform_get_device_id(pdev);
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+ if (!id)
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+ return -ENXIO;
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+
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+ variant = (const struct armada_variant *)id->driver_data;
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+ } else {
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+ const struct of_device_id *match;
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+ struct device_node *np, *parent = dev->of_node;
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+
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+ match = of_match_device(dev->driver->of_match_table, dev);
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+ if (!match)
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+ return -ENXIO;
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+
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+ np = of_get_child_by_name(parent, "ports");
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+ if (np)
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+ parent = np;
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+ port = of_get_child_by_name(parent, "port");
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+ of_node_put(np);
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+ if (!port) {
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+ dev_err(dev, "no port node found in %s\n",
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+ parent->full_name);
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+ return -ENXIO;
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+ }
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+
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+ variant = match->data;
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+ }
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+
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+ return armada_drm_crtc_create(drm, dev, res, irq, variant, port);
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+}
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+
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+static void
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+armada_lcd_unbind(struct device *dev, struct device *master, void *data)
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+{
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+ struct armada_crtc *dcrtc = dev_get_drvdata(dev);
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+
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+ armada_drm_crtc_destroy(&dcrtc->crtc);
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}
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+
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+static const struct component_ops armada_lcd_ops = {
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+ .bind = armada_lcd_bind,
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+ .unbind = armada_lcd_unbind,
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+};
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+
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+static int armada_lcd_probe(struct platform_device *pdev)
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+{
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+ return component_add(&pdev->dev, &armada_lcd_ops);
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+}
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+
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+static int armada_lcd_remove(struct platform_device *pdev)
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+{
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+ component_del(&pdev->dev, &armada_lcd_ops);
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+ return 0;
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+}
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+
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+static struct of_device_id armada_lcd_of_match[] = {
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+ {
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+ .compatible = "marvell,dove-lcd",
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+ .data = &armada510_ops,
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+ },
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+ {}
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+};
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+MODULE_DEVICE_TABLE(of, armada_lcd_of_match);
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+
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+static const struct platform_device_id armada_lcd_platform_ids[] = {
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+ {
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+ .name = "armada-lcd",
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+ .driver_data = (unsigned long)&armada510_ops,
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+ }, {
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+ .name = "armada-510-lcd",
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+ .driver_data = (unsigned long)&armada510_ops,
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+ },
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+ { },
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+};
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+MODULE_DEVICE_TABLE(platform, armada_lcd_platform_ids);
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+
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+struct platform_driver armada_lcd_platform_driver = {
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+ .probe = armada_lcd_probe,
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+ .remove = armada_lcd_remove,
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+ .driver = {
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+ .name = "armada-lcd",
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+ .owner = THIS_MODULE,
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+ .of_match_table = armada_lcd_of_match,
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+ },
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+ .id_table = armada_lcd_platform_ids,
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+};
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