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@@ -533,7 +533,7 @@ static inline void ipw_clear_bit(struct ipw_priv *priv, u32 reg, u32 mask)
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ipw_write32(priv, reg, ipw_read32(priv, reg) & ~mask);
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}
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-static inline void ipw_enable_interrupts(struct ipw_priv *priv)
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+static inline void __ipw_enable_interrupts(struct ipw_priv *priv)
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{
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if (priv->status & STATUS_INT_ENABLED)
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return;
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@@ -541,7 +541,7 @@ static inline void ipw_enable_interrupts(struct ipw_priv *priv)
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ipw_write32(priv, IPW_INTA_MASK_R, IPW_INTA_MASK_ALL);
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}
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-static inline void ipw_disable_interrupts(struct ipw_priv *priv)
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+static inline void __ipw_disable_interrupts(struct ipw_priv *priv)
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{
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if (!(priv->status & STATUS_INT_ENABLED))
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return;
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@@ -549,6 +549,24 @@ static inline void ipw_disable_interrupts(struct ipw_priv *priv)
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ipw_write32(priv, IPW_INTA_MASK_R, ~IPW_INTA_MASK_ALL);
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}
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+static inline void ipw_enable_interrupts(struct ipw_priv *priv)
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+{
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+ unsigned long flags;
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+
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+ spin_lock_irqsave(&priv->irq_lock, flags);
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+ __ipw_enable_interrupts(priv);
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+ spin_unlock_irqrestore(&priv->irq_lock, flags);
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+}
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+
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+static inline void ipw_disable_interrupts(struct ipw_priv *priv)
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+{
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+ unsigned long flags;
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+
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+ spin_lock_irqsave(&priv->irq_lock, flags);
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+ __ipw_disable_interrupts(priv);
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+ spin_unlock_irqrestore(&priv->irq_lock, flags);
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+}
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+
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#ifdef CONFIG_IPW2200_DEBUG
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static char *ipw_error_desc(u32 val)
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{
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@@ -1856,7 +1874,7 @@ static void ipw_irq_tasklet(struct ipw_priv *priv)
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unsigned long flags;
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int rc = 0;
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- spin_lock_irqsave(&priv->lock, flags);
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+ spin_lock_irqsave(&priv->irq_lock, flags);
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inta = ipw_read32(priv, IPW_INTA_RW);
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inta_mask = ipw_read32(priv, IPW_INTA_MASK_R);
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@@ -1865,6 +1883,10 @@ static void ipw_irq_tasklet(struct ipw_priv *priv)
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/* Add any cached INTA values that need to be handled */
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inta |= priv->isr_inta;
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+ spin_unlock_irqrestore(&priv->irq_lock, flags);
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+
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+ spin_lock_irqsave(&priv->lock, flags);
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+
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/* handle all the justifications for the interrupt */
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if (inta & IPW_INTA_BIT_RX_TRANSFER) {
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ipw_rx(priv);
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@@ -1993,10 +2015,10 @@ static void ipw_irq_tasklet(struct ipw_priv *priv)
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IPW_ERROR("Unhandled INTA bits 0x%08x\n", inta & ~handled);
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}
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+ spin_unlock_irqrestore(&priv->lock, flags);
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+
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/* enable all interrupts */
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ipw_enable_interrupts(priv);
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-
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- spin_unlock_irqrestore(&priv->lock, flags);
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}
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#define IPW_CMD(x) case IPW_CMD_ ## x : return #x
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@@ -10460,7 +10482,7 @@ static irqreturn_t ipw_isr(int irq, void *data, struct pt_regs *regs)
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if (!priv)
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return IRQ_NONE;
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- spin_lock(&priv->lock);
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+ spin_lock(&priv->irq_lock);
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if (!(priv->status & STATUS_INT_ENABLED)) {
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/* Shared IRQ */
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@@ -10482,7 +10504,7 @@ static irqreturn_t ipw_isr(int irq, void *data, struct pt_regs *regs)
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}
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/* tell the device to stop sending interrupts */
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- ipw_disable_interrupts(priv);
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+ __ipw_disable_interrupts(priv);
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/* ack current interrupts */
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inta &= (IPW_INTA_MASK_ALL & inta_mask);
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@@ -10493,11 +10515,11 @@ static irqreturn_t ipw_isr(int irq, void *data, struct pt_regs *regs)
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tasklet_schedule(&priv->irq_tasklet);
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- spin_unlock(&priv->lock);
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+ spin_unlock(&priv->irq_lock);
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return IRQ_HANDLED;
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none:
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- spin_unlock(&priv->lock);
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+ spin_unlock(&priv->irq_lock);
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return IRQ_NONE;
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}
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@@ -11477,6 +11499,7 @@ static int ipw_pci_probe(struct pci_dev *pdev, const struct pci_device_id *ent)
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#ifdef CONFIG_IPW2200_DEBUG
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ipw_debug_level = debug;
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#endif
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+ spin_lock_init(&priv->irq_lock);
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spin_lock_init(&priv->lock);
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for (i = 0; i < IPW_IBSS_MAC_HASH_SIZE; i++)
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INIT_LIST_HEAD(&priv->ibss_mac_hash[i]);
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