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@@ -41,6 +41,15 @@
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/******************************************************************
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* IRQ Control Macros
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+ *
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+ * All of them have "memory" clobber (compiler barrier) which is needed to
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+ * ensure that LD/ST requiring irq safetly (R-M-W when LLSC is not available)
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+ * are redone after IRQs are re-enabled (and gcc doesn't reuse stale register)
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+ *
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+ * Noted at the time of Abilis Timer List corruption
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+ * Orig Bug + Rejected solution : https://lkml.org/lkml/2013/3/29/67
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+ * Reasoning : https://lkml.org/lkml/2013/4/8/15
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+ *
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******************************************************************/
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/*
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