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@@ -2534,34 +2534,38 @@ int cx231xx_initialize_stream_xfer(struct cx231xx *dev, u32 media_type)
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break;
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case TS1_serial_mode:
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- pr_info("%s: set ts1 registers", __func__);
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-
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- if (dev->board.has_417) {
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- pr_info(" MPEG\n");
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- value &= 0xFFFFFFFC;
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- value |= 0x3;
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-
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- status = cx231xx_mode_register(dev, TS_MODE_REG, value);
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-
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- val[0] = 0x04;
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- val[1] = 0xA3;
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- val[2] = 0x3B;
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- val[3] = 0x00;
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- status = cx231xx_write_ctrl_reg(dev, VRT_SET_REGISTER,
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- TS1_CFG_REG, val, 4);
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-
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- val[0] = 0x00;
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- val[1] = 0x08;
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- val[2] = 0x00;
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- val[3] = 0x08;
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- status = cx231xx_write_ctrl_reg(dev, VRT_SET_REGISTER,
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- TS1_LENGTH_REG, val, 4);
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-
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- } else {
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- pr_info(" BDA\n");
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- status = cx231xx_mode_register(dev, TS_MODE_REG, 0x101);
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- status = cx231xx_mode_register(dev, TS1_CFG_REG, 0x010);
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- }
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+ pr_debug("%s: set ts1 registers", __func__);
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+
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+ if (dev->board.has_417) {
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+ pr_debug("%s: MPEG\n", __func__);
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+ value &= 0xFFFFFFFC;
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+ value |= 0x3;
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+
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+ status = cx231xx_mode_register(dev,
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+ TS_MODE_REG, value);
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+
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+ val[0] = 0x04;
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+ val[1] = 0xA3;
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+ val[2] = 0x3B;
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+ val[3] = 0x00;
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+ status = cx231xx_write_ctrl_reg(dev,
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+ VRT_SET_REGISTER,
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+ TS1_CFG_REG, val, 4);
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+
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+ val[0] = 0x00;
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+ val[1] = 0x08;
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+ val[2] = 0x00;
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+ val[3] = 0x08;
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+ status = cx231xx_write_ctrl_reg(dev,
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+ VRT_SET_REGISTER,
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+ TS1_LENGTH_REG, val, 4);
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+ } else {
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+ pr_debug("%s: BDA\n", __func__);
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+ status = cx231xx_mode_register(dev,
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+ TS_MODE_REG, 0x101);
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+ status = cx231xx_mode_register(dev,
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+ TS1_CFG_REG, 0x010);
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+ }
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break;
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case TS1_parallel_mode:
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