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@@ -47,6 +47,7 @@ struct rockchip_hdmi {
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struct drm_encoder encoder;
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const struct rockchip_hdmi_chip_data *chip_data;
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struct clk *vpll_clk;
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+ struct clk *grf_clk;
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};
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#define to_rockchip_hdmi(x) container_of(x, struct rockchip_hdmi, x)
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@@ -181,6 +182,16 @@ static int rockchip_hdmi_parse_dt(struct rockchip_hdmi *hdmi)
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return PTR_ERR(hdmi->vpll_clk);
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}
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+ hdmi->grf_clk = devm_clk_get(hdmi->dev, "grf");
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+ if (PTR_ERR(hdmi->grf_clk) == -ENOENT) {
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+ hdmi->grf_clk = NULL;
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+ } else if (PTR_ERR(hdmi->grf_clk) == -EPROBE_DEFER) {
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+ return -EPROBE_DEFER;
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+ } else if (IS_ERR(hdmi->grf_clk)) {
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+ dev_err(hdmi->dev, "failed to get grf clock\n");
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+ return PTR_ERR(hdmi->grf_clk);
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+ }
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+
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ret = clk_prepare_enable(hdmi->vpll_clk);
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if (ret) {
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dev_err(hdmi->dev, "Failed to enable HDMI vpll: %d\n", ret);
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@@ -246,10 +257,17 @@ static void dw_hdmi_rockchip_encoder_enable(struct drm_encoder *encoder)
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else
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val = hdmi->chip_data->lcdsel_big;
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+ ret = clk_prepare_enable(hdmi->grf_clk);
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+ if (ret < 0) {
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+ dev_err(hdmi->dev, "failed to enable grfclk %d\n", ret);
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+ return;
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+ }
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+
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ret = regmap_write(hdmi->regmap, hdmi->chip_data->lcdsel_grf_reg, val);
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if (ret != 0)
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dev_err(hdmi->dev, "Could not write to GRF: %d\n", ret);
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+ clk_disable_unprepare(hdmi->grf_clk);
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dev_dbg(hdmi->dev, "vop %s output to hdmi\n",
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ret ? "LIT" : "BIG");
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}
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