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clk: mvebu: share locks between gate clocks

Refactor mvebu_clk_gating_setup() to use a common spinlock instead of a
unique lock for every instance of a struct clk_gating_ctrl object. This
will be used later for a separate mux clock type that shares a register
with gate clock types and needs to use the same lock to protect access
to the register.

Cc: Andrew Lunn <andrew@lunn.ch>
Tested-by: Andrew Lunn <andrew@lunn.ch>
Signed-off-by: Mike Turquette <mturquette@linaro.org>
Mike Turquette 11 years ago
parent
commit
87e392164a
2 changed files with 8 additions and 3 deletions
  1. 6 3
      drivers/clk/mvebu/common.c
  2. 2 0
      drivers/clk/mvebu/common.h

+ 6 - 3
drivers/clk/mvebu/common.c

@@ -89,8 +89,10 @@ void __init mvebu_coreclk_setup(struct device_node *np,
  * Clock Gating Control
  */
 
+DEFINE_SPINLOCK(ctrl_gating_lock);
+
 struct clk_gating_ctrl {
-	spinlock_t lock;
+	spinlock_t *lock;
 	struct clk **gates;
 	int num_gates;
 };
@@ -138,7 +140,8 @@ void __init mvebu_clk_gating_setup(struct device_node *np,
 	if (WARN_ON(!ctrl))
 		goto ctrl_out;
 
-	spin_lock_init(&ctrl->lock);
+	/* lock must already be initialized */
+	ctrl->lock = &ctrl_gating_lock;
 
 	/* Count, allocate, and register clock gates */
 	for (n = 0; desc[n].name;)
@@ -155,7 +158,7 @@ void __init mvebu_clk_gating_setup(struct device_node *np,
 			(desc[n].parent) ? desc[n].parent : default_parent;
 		ctrl->gates[n] = clk_register_gate(NULL, desc[n].name, parent,
 					desc[n].flags, base, desc[n].bit_idx,
-					0, &ctrl->lock);
+					0, ctrl->lock);
 		WARN_ON(IS_ERR(ctrl->gates[n]));
 	}
 

+ 2 - 0
drivers/clk/mvebu/common.h

@@ -17,6 +17,8 @@
 
 #include <linux/kernel.h>
 
+extern spinlock_t ctrl_gating_lock;
+
 struct device_node;
 
 struct coreclk_ratio {