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@@ -10,8 +10,8 @@
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#include <linux/dma-mapping.h>
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#include "sti_compositor.h"
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+#include "sti_drm_plane.h"
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#include "sti_gdp.h"
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-#include "sti_layer.h"
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#include "sti_vtg.h"
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#define ALPHASWITCH BIT(6)
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@@ -85,16 +85,20 @@ struct sti_gdp_node_list {
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/**
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* STI GDP structure
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*
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- * @layer: layer structure
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+ * @sti_plane: sti_plane structure
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+ * @dev: driver device
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+ * @regs: gdp registers
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* @clk_pix: pixel clock for the current gdp
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* @clk_main_parent: gdp parent clock if main path used
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* @clk_aux_parent: gdp parent clock if aux path used
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* @vtg_field_nb: callback for VTG FIELD (top or bottom) notification
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* @is_curr_top: true if the current node processed is the top field
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- * @node_list: array of node list
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+ * @node_list: array of node list
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*/
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struct sti_gdp {
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- struct sti_layer layer;
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+ struct sti_plane plane;
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+ struct device *dev;
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+ void __iomem *regs;
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struct clk *clk_pix;
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struct clk *clk_main_parent;
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struct clk *clk_aux_parent;
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@@ -103,7 +107,7 @@ struct sti_gdp {
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struct sti_gdp_node_list node_list[GDP_NODE_NB_BANK];
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};
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-#define to_sti_gdp(x) container_of(x, struct sti_gdp, layer)
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+#define to_sti_gdp(x) container_of(x, struct sti_gdp, plane)
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static const uint32_t gdp_supported_formats[] = {
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DRM_FORMAT_XRGB8888,
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@@ -120,12 +124,12 @@ static const uint32_t gdp_supported_formats[] = {
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DRM_FORMAT_C8,
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};
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-static const uint32_t *sti_gdp_get_formats(struct sti_layer *layer)
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+static const uint32_t *sti_gdp_get_formats(struct sti_plane *plane)
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{
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return gdp_supported_formats;
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}
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-static unsigned int sti_gdp_get_nb_formats(struct sti_layer *layer)
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+static unsigned int sti_gdp_get_nb_formats(struct sti_plane *plane)
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{
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return ARRAY_SIZE(gdp_supported_formats);
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}
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@@ -175,20 +179,20 @@ static int sti_gdp_get_alpharange(int format)
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/**
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* sti_gdp_get_free_nodes
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- * @layer: gdp layer
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+ * @plane: gdp plane
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*
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* Look for a GDP node list that is not currently read by the HW.
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*
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* RETURNS:
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* Pointer to the free GDP node list
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*/
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-static struct sti_gdp_node_list *sti_gdp_get_free_nodes(struct sti_layer *layer)
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+static struct sti_gdp_node_list *sti_gdp_get_free_nodes(struct sti_plane *plane)
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{
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int hw_nvn;
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- struct sti_gdp *gdp = to_sti_gdp(layer);
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+ struct sti_gdp *gdp = to_sti_gdp(plane);
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unsigned int i;
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- hw_nvn = readl(layer->regs + GAM_GDP_NVN_OFFSET);
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+ hw_nvn = readl(gdp->regs + GAM_GDP_NVN_OFFSET);
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if (!hw_nvn)
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goto end;
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@@ -199,7 +203,7 @@ static struct sti_gdp_node_list *sti_gdp_get_free_nodes(struct sti_layer *layer)
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/* in hazardious cases restart with the first node */
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DRM_ERROR("inconsistent NVN for %s: 0x%08X\n",
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- sti_layer_to_str(layer), hw_nvn);
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+ sti_plane_to_str(plane), hw_nvn);
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end:
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return &gdp->node_list[0];
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@@ -207,7 +211,7 @@ end:
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/**
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* sti_gdp_get_current_nodes
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- * @layer: GDP layer
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+ * @plane: GDP plane
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*
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* Look for GDP nodes that are currently read by the HW.
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*
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@@ -215,13 +219,13 @@ end:
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* Pointer to the current GDP node list
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*/
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static
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-struct sti_gdp_node_list *sti_gdp_get_current_nodes(struct sti_layer *layer)
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+struct sti_gdp_node_list *sti_gdp_get_current_nodes(struct sti_plane *plane)
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{
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int hw_nvn;
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- struct sti_gdp *gdp = to_sti_gdp(layer);
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+ struct sti_gdp *gdp = to_sti_gdp(plane);
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unsigned int i;
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- hw_nvn = readl(layer->regs + GAM_GDP_NVN_OFFSET);
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+ hw_nvn = readl(gdp->regs + GAM_GDP_NVN_OFFSET);
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if (!hw_nvn)
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goto end;
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@@ -232,28 +236,28 @@ struct sti_gdp_node_list *sti_gdp_get_current_nodes(struct sti_layer *layer)
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end:
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DRM_DEBUG_DRIVER("Warning, NVN 0x%08X for %s does not match any node\n",
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- hw_nvn, sti_layer_to_str(layer));
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+ hw_nvn, sti_plane_to_str(plane));
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return NULL;
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}
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/**
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- * sti_gdp_prepare_layer
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- * @lay: gdp layer
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+ * sti_gdp_prepare
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+ * @plane: gdp plane
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* @first_prepare: true if it is the first time this function is called
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*
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- * Update the free GDP node list according to the layer properties.
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+ * Update the free GDP node list according to the plane properties.
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*
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* RETURNS:
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* 0 on success.
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*/
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-static int sti_gdp_prepare_layer(struct sti_layer *layer, bool first_prepare)
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+static int sti_gdp_prepare(struct sti_plane *plane, bool first_prepare)
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{
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struct sti_gdp_node_list *list;
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struct sti_gdp_node *top_field, *btm_field;
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- struct drm_display_mode *mode = layer->mode;
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- struct device *dev = layer->dev;
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- struct sti_gdp *gdp = to_sti_gdp(layer);
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+ struct drm_display_mode *mode = plane->mode;
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+ struct sti_gdp *gdp = to_sti_gdp(plane);
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+ struct device *dev = gdp->dev;
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struct sti_compositor *compo = dev_get_drvdata(dev);
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int format;
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unsigned int depth, bpp;
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@@ -261,20 +265,20 @@ static int sti_gdp_prepare_layer(struct sti_layer *layer, bool first_prepare)
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int res;
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u32 ydo, xdo, yds, xds;
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- list = sti_gdp_get_free_nodes(layer);
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+ list = sti_gdp_get_free_nodes(plane);
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top_field = list->top_field;
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btm_field = list->btm_field;
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dev_dbg(dev, "%s %s top_node:0x%p btm_node:0x%p\n", __func__,
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- sti_layer_to_str(layer), top_field, btm_field);
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+ sti_plane_to_str(plane), top_field, btm_field);
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- /* Build the top field from layer params */
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+ /* Build the top field from plane params */
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top_field->gam_gdp_agc = GAM_GDP_AGC_FULL_RANGE;
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top_field->gam_gdp_ctl = WAIT_NEXT_VSYNC;
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- format = sti_gdp_fourcc2format(layer->format);
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+ format = sti_gdp_fourcc2format(plane->format);
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if (format == -1) {
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DRM_ERROR("Format not supported by GDP %.4s\n",
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- (char *)&layer->format);
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+ (char *)&plane->format);
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return 1;
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}
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top_field->gam_gdp_ctl |= format;
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@@ -282,22 +286,22 @@ static int sti_gdp_prepare_layer(struct sti_layer *layer, bool first_prepare)
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top_field->gam_gdp_ppt &= ~GAM_GDP_PPT_IGNORE;
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/* pixel memory location */
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- drm_fb_get_bpp_depth(layer->format, &depth, &bpp);
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- top_field->gam_gdp_pml = (u32) layer->paddr + layer->offsets[0];
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- top_field->gam_gdp_pml += layer->src_x * (bpp >> 3);
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- top_field->gam_gdp_pml += layer->src_y * layer->pitches[0];
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+ drm_fb_get_bpp_depth(plane->format, &depth, &bpp);
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+ top_field->gam_gdp_pml = (u32)plane->paddr + plane->offsets[0];
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+ top_field->gam_gdp_pml += plane->src_x * (bpp >> 3);
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+ top_field->gam_gdp_pml += plane->src_y * plane->pitches[0];
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/* input parameters */
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- top_field->gam_gdp_pmp = layer->pitches[0];
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+ top_field->gam_gdp_pmp = plane->pitches[0];
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top_field->gam_gdp_size =
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- clamp_val(layer->src_h, 0, GAM_GDP_SIZE_MAX) << 16 |
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- clamp_val(layer->src_w, 0, GAM_GDP_SIZE_MAX);
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+ clamp_val(plane->src_h, 0, GAM_GDP_SIZE_MAX) << 16 |
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+ clamp_val(plane->src_w, 0, GAM_GDP_SIZE_MAX);
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/* output parameters */
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- ydo = sti_vtg_get_line_number(*mode, layer->dst_y);
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- yds = sti_vtg_get_line_number(*mode, layer->dst_y + layer->dst_h - 1);
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- xdo = sti_vtg_get_pixel_number(*mode, layer->dst_x);
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- xds = sti_vtg_get_pixel_number(*mode, layer->dst_x + layer->dst_w - 1);
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+ ydo = sti_vtg_get_line_number(*mode, plane->dst_y);
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+ yds = sti_vtg_get_line_number(*mode, plane->dst_y + plane->dst_h - 1);
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+ xdo = sti_vtg_get_pixel_number(*mode, plane->dst_x);
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+ xds = sti_vtg_get_pixel_number(*mode, plane->dst_x + plane->dst_w - 1);
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top_field->gam_gdp_vpo = (ydo << 16) | xdo;
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top_field->gam_gdp_vps = (yds << 16) | xds;
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@@ -307,15 +311,15 @@ static int sti_gdp_prepare_layer(struct sti_layer *layer, bool first_prepare)
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btm_field->gam_gdp_nvn = list->top_field_paddr;
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/* Interlaced mode */
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- if (layer->mode->flags & DRM_MODE_FLAG_INTERLACE)
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+ if (plane->mode->flags & DRM_MODE_FLAG_INTERLACE)
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btm_field->gam_gdp_pml = top_field->gam_gdp_pml +
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- layer->pitches[0];
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+ plane->pitches[0];
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if (first_prepare) {
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/* Register gdp callback */
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- if (sti_vtg_register_client(layer->mixer_id == STI_MIXER_MAIN ?
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+ if (sti_vtg_register_client(plane->mixer_id == STI_MIXER_MAIN ?
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compo->vtg_main : compo->vtg_aux,
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- &gdp->vtg_field_nb, layer->mixer_id)) {
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+ &gdp->vtg_field_nb, plane->mixer_id)) {
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DRM_ERROR("Cannot register VTG notifier\n");
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return 1;
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}
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@@ -325,7 +329,7 @@ static int sti_gdp_prepare_layer(struct sti_layer *layer, bool first_prepare)
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struct clk *clkp;
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/* According to the mixer used, the gdp pixel clock
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* should have a different parent clock. */
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- if (layer->mixer_id == STI_MIXER_MAIN)
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+ if (plane->mixer_id == STI_MIXER_MAIN)
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clkp = gdp->clk_main_parent;
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else
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clkp = gdp->clk_aux_parent;
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@@ -351,8 +355,8 @@ static int sti_gdp_prepare_layer(struct sti_layer *layer, bool first_prepare)
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}
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/**
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- * sti_gdp_commit_layer
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- * @lay: gdp layer
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+ * sti_gdp_commit
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+ * @plane: gdp plane
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*
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* Update the NVN field of the 'right' field of the current GDP node (being
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* used by the HW) with the address of the updated ('free') top field GDP node.
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@@ -365,38 +369,38 @@ static int sti_gdp_prepare_layer(struct sti_layer *layer, bool first_prepare)
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* RETURNS:
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* 0 on success.
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*/
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-static int sti_gdp_commit_layer(struct sti_layer *layer)
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+static int sti_gdp_commit(struct sti_plane *plane)
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{
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- struct sti_gdp_node_list *updated_list = sti_gdp_get_free_nodes(layer);
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+ struct sti_gdp_node_list *updated_list = sti_gdp_get_free_nodes(plane);
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struct sti_gdp_node *updated_top_node = updated_list->top_field;
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struct sti_gdp_node *updated_btm_node = updated_list->btm_field;
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- struct sti_gdp *gdp = to_sti_gdp(layer);
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+ struct sti_gdp *gdp = to_sti_gdp(plane);
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u32 dma_updated_top = updated_list->top_field_paddr;
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u32 dma_updated_btm = updated_list->btm_field_paddr;
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- struct sti_gdp_node_list *curr_list = sti_gdp_get_current_nodes(layer);
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+ struct sti_gdp_node_list *curr_list = sti_gdp_get_current_nodes(plane);
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- dev_dbg(layer->dev, "%s %s top/btm_node:0x%p/0x%p\n", __func__,
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- sti_layer_to_str(layer),
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- updated_top_node, updated_btm_node);
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- dev_dbg(layer->dev, "Current NVN:0x%X\n",
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- readl(layer->regs + GAM_GDP_NVN_OFFSET));
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- dev_dbg(layer->dev, "Posted buff: %lx current buff: %x\n",
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- (unsigned long)layer->paddr,
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- readl(layer->regs + GAM_GDP_PML_OFFSET));
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+ dev_dbg(gdp->dev, "%s %s top/btm_node:0x%p/0x%p\n", __func__,
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+ sti_plane_to_str(plane),
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+ updated_top_node, updated_btm_node);
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+ dev_dbg(gdp->dev, "Current NVN:0x%X\n",
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+ readl(gdp->regs + GAM_GDP_NVN_OFFSET));
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+ dev_dbg(gdp->dev, "Posted buff: %lx current buff: %x\n",
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+ (unsigned long)plane->paddr,
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+ readl(gdp->regs + GAM_GDP_PML_OFFSET));
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if (curr_list == NULL) {
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/* First update or invalid node should directly write in the
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* hw register */
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DRM_DEBUG_DRIVER("%s first update (or invalid node)",
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- sti_layer_to_str(layer));
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+ sti_plane_to_str(plane));
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writel(gdp->is_curr_top == true ?
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dma_updated_btm : dma_updated_top,
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- layer->regs + GAM_GDP_NVN_OFFSET);
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+ gdp->regs + GAM_GDP_NVN_OFFSET);
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return 0;
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}
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- if (layer->mode->flags & DRM_MODE_FLAG_INTERLACE) {
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+ if (plane->mode->flags & DRM_MODE_FLAG_INTERLACE) {
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if (gdp->is_curr_top == true) {
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/* Do not update in the middle of the frame, but
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* postpone the update after the bottom field has
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@@ -405,32 +409,32 @@ static int sti_gdp_commit_layer(struct sti_layer *layer)
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} else {
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/* Direct update to avoid one frame delay */
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writel(dma_updated_top,
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- layer->regs + GAM_GDP_NVN_OFFSET);
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+ gdp->regs + GAM_GDP_NVN_OFFSET);
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}
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} else {
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/* Direct update for progressive to avoid one frame delay */
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- writel(dma_updated_top, layer->regs + GAM_GDP_NVN_OFFSET);
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+ writel(dma_updated_top, gdp->regs + GAM_GDP_NVN_OFFSET);
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}
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return 0;
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}
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/**
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- * sti_gdp_disable_layer
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- * @lay: gdp layer
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+ * sti_gdp_disable
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+ * @plane: gdp plane
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*
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* Disable a GDP.
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*
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* RETURNS:
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* 0 on success.
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*/
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-static int sti_gdp_disable_layer(struct sti_layer *layer)
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+static int sti_gdp_disable(struct sti_plane *plane)
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{
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unsigned int i;
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- struct sti_gdp *gdp = to_sti_gdp(layer);
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- struct sti_compositor *compo = dev_get_drvdata(layer->dev);
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+ struct sti_gdp *gdp = to_sti_gdp(plane);
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+ struct sti_compositor *compo = dev_get_drvdata(gdp->dev);
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- DRM_DEBUG_DRIVER("%s\n", sti_layer_to_str(layer));
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+ DRM_DEBUG_DRIVER("%s\n", sti_plane_to_str(plane));
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/* Set the nodes as 'to be ignored on mixer' */
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for (i = 0; i < GDP_NODE_NB_BANK; i++) {
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@@ -438,7 +442,7 @@ static int sti_gdp_disable_layer(struct sti_layer *layer)
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gdp->node_list[i].btm_field->gam_gdp_ppt |= GAM_GDP_PPT_IGNORE;
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}
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- if (sti_vtg_unregister_client(layer->mixer_id == STI_MIXER_MAIN ?
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+ if (sti_vtg_unregister_client(plane->mixer_id == STI_MIXER_MAIN ?
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compo->vtg_main : compo->vtg_aux, &gdp->vtg_field_nb))
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DRM_DEBUG_DRIVER("Warning: cannot unregister VTG notifier\n");
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@@ -479,10 +483,9 @@ int sti_gdp_field_cb(struct notifier_block *nb,
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return 0;
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}
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-static void sti_gdp_init(struct sti_layer *layer)
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+static void sti_gdp_init(struct sti_gdp *gdp)
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{
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- struct sti_gdp *gdp = to_sti_gdp(layer);
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- struct device_node *np = layer->dev->of_node;
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+ struct device_node *np = gdp->dev->of_node;
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dma_addr_t dma_addr;
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void *base;
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unsigned int i, size;
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@@ -490,8 +493,8 @@ static void sti_gdp_init(struct sti_layer *layer)
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/* Allocate all the nodes within a single memory page */
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size = sizeof(struct sti_gdp_node) *
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GDP_NODE_PER_FIELD * GDP_NODE_NB_BANK;
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- base = dma_alloc_writecombine(layer->dev,
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- size, &dma_addr, GFP_KERNEL | GFP_DMA);
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+ base = dma_alloc_writecombine(gdp->dev,
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+ size, &dma_addr, GFP_KERNEL | GFP_DMA);
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if (!base) {
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DRM_ERROR("Failed to allocate memory for GDP node\n");
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@@ -526,7 +529,7 @@ static void sti_gdp_init(struct sti_layer *layer)
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/* GDP of STiH407 chip have its own pixel clock */
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char *clk_name;
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- switch (layer->desc) {
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+ switch (gdp->plane.desc) {
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case STI_GDP_0:
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clk_name = "pix_gdp1";
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break;
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@@ -544,30 +547,30 @@ static void sti_gdp_init(struct sti_layer *layer)
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return;
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}
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- gdp->clk_pix = devm_clk_get(layer->dev, clk_name);
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+ gdp->clk_pix = devm_clk_get(gdp->dev, clk_name);
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if (IS_ERR(gdp->clk_pix))
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DRM_ERROR("Cannot get %s clock\n", clk_name);
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- gdp->clk_main_parent = devm_clk_get(layer->dev, "main_parent");
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+ gdp->clk_main_parent = devm_clk_get(gdp->dev, "main_parent");
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if (IS_ERR(gdp->clk_main_parent))
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DRM_ERROR("Cannot get main_parent clock\n");
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- gdp->clk_aux_parent = devm_clk_get(layer->dev, "aux_parent");
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+ gdp->clk_aux_parent = devm_clk_get(gdp->dev, "aux_parent");
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if (IS_ERR(gdp->clk_aux_parent))
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DRM_ERROR("Cannot get aux_parent clock\n");
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}
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}
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-static const struct sti_layer_funcs gdp_ops = {
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+static const struct sti_plane_funcs gdp_plane_ops = {
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.get_formats = sti_gdp_get_formats,
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.get_nb_formats = sti_gdp_get_nb_formats,
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- .init = sti_gdp_init,
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- .prepare = sti_gdp_prepare_layer,
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- .commit = sti_gdp_commit_layer,
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- .disable = sti_gdp_disable_layer,
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+ .prepare = sti_gdp_prepare,
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+ .commit = sti_gdp_commit,
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+ .disable = sti_gdp_disable,
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};
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-struct sti_layer *sti_gdp_create(struct device *dev, int id)
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+struct sti_plane *sti_gdp_create(struct device *dev, int desc,
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+ void __iomem *baseaddr)
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{
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struct sti_gdp *gdp;
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@@ -577,8 +580,14 @@ struct sti_layer *sti_gdp_create(struct device *dev, int id)
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return NULL;
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}
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- gdp->layer.ops = &gdp_ops;
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+ gdp->dev = dev;
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+ gdp->regs = baseaddr;
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+ gdp->plane.desc = desc;
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+ gdp->plane.ops = &gdp_plane_ops;
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+
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gdp->vtg_field_nb.notifier_call = sti_gdp_field_cb;
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- return (struct sti_layer *)gdp;
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+ sti_gdp_init(gdp);
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+
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+ return &gdp->plane;
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}
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