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@@ -53,10 +53,6 @@ struct imx_chip {
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void __iomem *mmio_base;
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struct pwm_chip chip;
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-
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- int (*config)(struct pwm_chip *chip,
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- struct pwm_device *pwm, int duty_ns, int period_ns);
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- void (*set_enable)(struct pwm_chip *chip, bool enable);
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};
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#define to_imx_chip(chip) container_of(chip, struct imx_chip, chip)
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@@ -159,95 +155,6 @@ static void imx_pwm_wait_fifo_slot(struct pwm_chip *chip,
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}
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}
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-static int imx_pwm_config_v2(struct pwm_chip *chip,
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- struct pwm_device *pwm, int duty_ns, int period_ns)
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-{
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- struct imx_chip *imx = to_imx_chip(chip);
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- unsigned long long c;
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- unsigned long period_cycles, duty_cycles, prescale;
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- bool enable = pwm_is_enabled(pwm);
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- u32 cr;
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-
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- /*
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- * i.MX PWMv2 has a 4-word sample FIFO.
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- * In order to avoid FIFO overflow issue, we do software reset
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- * to clear all sample FIFO if the controller is disabled or
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- * wait for a full PWM cycle to get a relinquished FIFO slot
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- * when the controller is enabled and the FIFO is fully loaded.
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- */
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- if (enable)
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- imx_pwm_wait_fifo_slot(chip, pwm);
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- else
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- imx_pwm_sw_reset(chip);
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-
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- c = clk_get_rate(imx->clk_per);
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- c = c * period_ns;
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- do_div(c, 1000000000);
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- period_cycles = c;
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-
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- prescale = period_cycles / 0x10000 + 1;
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-
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- period_cycles /= prescale;
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- c = (unsigned long long)period_cycles * duty_ns;
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- do_div(c, period_ns);
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- duty_cycles = c;
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-
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- /*
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- * according to imx pwm RM, the real period value should be
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- * PERIOD value in PWMPR plus 2.
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- */
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- if (period_cycles > 2)
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- period_cycles -= 2;
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- else
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- period_cycles = 0;
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-
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- writel(duty_cycles, imx->mmio_base + MX3_PWMSAR);
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- writel(period_cycles, imx->mmio_base + MX3_PWMPR);
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-
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- cr = MX3_PWMCR_PRESCALER(prescale) |
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- MX3_PWMCR_DOZEEN | MX3_PWMCR_WAITEN |
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- MX3_PWMCR_DBGEN | MX3_PWMCR_CLKSRC_IPG_HIGH;
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-
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- if (enable)
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- cr |= MX3_PWMCR_EN;
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-
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- writel(cr, imx->mmio_base + MX3_PWMCR);
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-
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- return 0;
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-}
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-
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-static void imx_pwm_set_enable_v2(struct pwm_chip *chip, bool enable)
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-{
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- struct imx_chip *imx = to_imx_chip(chip);
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- u32 val;
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-
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- val = readl(imx->mmio_base + MX3_PWMCR);
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-
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- if (enable)
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- val |= MX3_PWMCR_EN;
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- else
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- val &= ~MX3_PWMCR_EN;
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-
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- writel(val, imx->mmio_base + MX3_PWMCR);
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-}
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-
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-static int imx_pwm_config(struct pwm_chip *chip,
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- struct pwm_device *pwm, int duty_ns, int period_ns)
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-{
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- struct imx_chip *imx = to_imx_chip(chip);
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- int ret;
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-
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- ret = clk_prepare_enable(imx->clk_per);
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- if (ret)
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- return ret;
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-
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- ret = imx->config(chip, pwm, duty_ns, period_ns);
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-
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- clk_disable_unprepare(imx->clk_per);
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-
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- return ret;
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-}
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-
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static int imx_pwm_apply_v2(struct pwm_chip *chip, struct pwm_device *pwm,
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struct pwm_state *state)
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{
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@@ -314,29 +221,6 @@ static int imx_pwm_apply_v2(struct pwm_chip *chip, struct pwm_device *pwm,
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return 0;
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}
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-static int imx_pwm_enable(struct pwm_chip *chip, struct pwm_device *pwm)
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-{
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- struct imx_chip *imx = to_imx_chip(chip);
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- int ret;
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-
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- ret = clk_prepare_enable(imx->clk_per);
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- if (ret)
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- return ret;
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-
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- imx->set_enable(chip, true);
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-
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- return 0;
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-}
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-
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-static void imx_pwm_disable(struct pwm_chip *chip, struct pwm_device *pwm)
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-{
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- struct imx_chip *imx = to_imx_chip(chip);
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-
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- imx->set_enable(chip, false);
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-
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- clk_disable_unprepare(imx->clk_per);
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-}
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-
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static const struct pwm_ops imx_pwm_ops_v1 = {
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.enable = imx_pwm_enable_v1,
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.disable = imx_pwm_disable_v1,
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@@ -346,16 +230,10 @@ static const struct pwm_ops imx_pwm_ops_v1 = {
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static const struct pwm_ops imx_pwm_ops_v2 = {
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.apply = imx_pwm_apply_v2,
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- .enable = imx_pwm_enable,
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- .disable = imx_pwm_disable,
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- .config = imx_pwm_config,
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.owner = THIS_MODULE,
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};
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struct imx_pwm_data {
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- int (*config)(struct pwm_chip *chip,
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- struct pwm_device *pwm, int duty_ns, int period_ns);
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- void (*set_enable)(struct pwm_chip *chip, bool enable);
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const struct pwm_ops *ops;
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};
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@@ -364,8 +242,6 @@ static struct imx_pwm_data imx_pwm_data_v1 = {
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};
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static struct imx_pwm_data imx_pwm_data_v2 = {
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- .config = imx_pwm_config_v2,
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- .set_enable = imx_pwm_set_enable_v2,
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.ops = &imx_pwm_ops_v2,
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};
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@@ -412,9 +288,6 @@ static int imx_pwm_probe(struct platform_device *pdev)
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if (IS_ERR(imx->mmio_base))
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return PTR_ERR(imx->mmio_base);
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- imx->config = data->config;
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- imx->set_enable = data->set_enable;
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-
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ret = pwmchip_add(&imx->chip);
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if (ret < 0)
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return ret;
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