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@@ -3,6 +3,9 @@
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#ifdef __KERNEL__
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#ifdef __KERNEL__
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#define ARCH_HAS_IOREMAP_WC
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#define ARCH_HAS_IOREMAP_WC
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+#ifdef CONFIG_PPC32
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+#define ARCH_HAS_IOREMAP_WT
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+#endif
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/*
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/*
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* This program is free software; you can redistribute it and/or
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* This program is free software; you can redistribute it and/or
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@@ -746,6 +749,10 @@ static inline void iosync(void)
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*
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*
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* * ioremap_wc enables write combining
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* * ioremap_wc enables write combining
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*
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*
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+ * * ioremap_wt enables write through
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+ *
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+ * * ioremap_coherent maps coherent cached memory
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+ *
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* * iounmap undoes such a mapping and can be hooked
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* * iounmap undoes such a mapping and can be hooked
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*
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*
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* * __ioremap_at (and the pending __iounmap_at) are low level functions to
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* * __ioremap_at (and the pending __iounmap_at) are low level functions to
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@@ -767,6 +774,8 @@ extern void __iomem *ioremap(phys_addr_t address, unsigned long size);
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extern void __iomem *ioremap_prot(phys_addr_t address, unsigned long size,
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extern void __iomem *ioremap_prot(phys_addr_t address, unsigned long size,
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unsigned long flags);
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unsigned long flags);
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extern void __iomem *ioremap_wc(phys_addr_t address, unsigned long size);
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extern void __iomem *ioremap_wc(phys_addr_t address, unsigned long size);
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+void __iomem *ioremap_wt(phys_addr_t address, unsigned long size);
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+void __iomem *ioremap_coherent(phys_addr_t address, unsigned long size);
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#define ioremap_nocache(addr, size) ioremap((addr), (size))
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#define ioremap_nocache(addr, size) ioremap((addr), (size))
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#define ioremap_uc(addr, size) ioremap((addr), (size))
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#define ioremap_uc(addr, size) ioremap((addr), (size))
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#define ioremap_cache(addr, size) \
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#define ioremap_cache(addr, size) \
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