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@@ -199,6 +199,30 @@ static void clk_alpha_pll_hwfsm_disable(struct clk_hw *hw)
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wait_for_pll_disable(pll);
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}
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+static int pll_is_enabled(struct clk_hw *hw, u32 mask)
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+{
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+ int ret;
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+ u32 val, off;
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+ struct clk_alpha_pll *pll = to_clk_alpha_pll(hw);
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+
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+ off = pll->offset;
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+ ret = regmap_read(pll->clkr.regmap, off + PLL_MODE, &val);
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+ if (ret)
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+ return ret;
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+
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+ return !!(val & mask);
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+}
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+
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+static int clk_alpha_pll_hwfsm_is_enabled(struct clk_hw *hw)
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+{
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+ return pll_is_enabled(hw, PLL_ACTIVE_FLAG);
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+}
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+
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+static int clk_alpha_pll_is_enabled(struct clk_hw *hw)
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+{
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+ return pll_is_enabled(hw, PLL_LOCK_DET);
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+}
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+
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static int clk_alpha_pll_enable(struct clk_hw *hw)
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{
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int ret;
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@@ -408,6 +432,7 @@ static long clk_alpha_pll_round_rate(struct clk_hw *hw, unsigned long rate,
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const struct clk_ops clk_alpha_pll_ops = {
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.enable = clk_alpha_pll_enable,
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.disable = clk_alpha_pll_disable,
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+ .is_enabled = clk_alpha_pll_is_enabled,
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.recalc_rate = clk_alpha_pll_recalc_rate,
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.round_rate = clk_alpha_pll_round_rate,
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.set_rate = clk_alpha_pll_set_rate,
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@@ -417,6 +442,7 @@ EXPORT_SYMBOL_GPL(clk_alpha_pll_ops);
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const struct clk_ops clk_alpha_pll_hwfsm_ops = {
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.enable = clk_alpha_pll_hwfsm_enable,
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.disable = clk_alpha_pll_hwfsm_disable,
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+ .is_enabled = clk_alpha_pll_hwfsm_is_enabled,
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.recalc_rate = clk_alpha_pll_recalc_rate,
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.round_rate = clk_alpha_pll_round_rate,
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.set_rate = clk_alpha_pll_set_rate,
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