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@@ -48,18 +48,14 @@ enum hw_cards_id {
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#define MAX_DIO_SUBDEVG 2 /* max number of DIO subdevices group per
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* card */
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-/* Register offset definitions */
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-/* Advantech PCI-1730/3/4 */
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-#define PCI1730_3_INT_EN 0x08 /* R/W: enable/disable interrupts */
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-#define PCI1730_3_INT_RF 0x0c /* R/W: set falling/raising edge for
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- * interrupts */
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-#define PCI1730_3_INT_CLR 0x10 /* R/W: clear interrupts */
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-
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-/* Advantech PCI-1736UP */
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-#define PCI1736_3_INT_EN 0x08 /* R/W: enable/disable interrupts */
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-#define PCI1736_3_INT_RF 0x0c /* R/W: set falling/raising edge for
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- * interrupts */
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-#define PCI1736_3_INT_CLR 0x10 /* R/W: clear interrupts */
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+/*
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+ * Register offset definitions
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+ */
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+
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+/* PCI-1730, PCI-1733, PCI-1736 interrupt control registers */
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+#define PCI173X_INT_EN_REG 0x08 /* R/W: enable/disable */
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+#define PCI173X_INT_RF_REG 0x0c /* R/W: falling/rising edge */
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+#define PCI173X_INT_CLR_REG 0x10 /* R/W: clear */
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/* Advantech PCI-1739U */
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#define PCI1739_ICR 32 /* W: Interrupt control register */
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@@ -311,14 +307,10 @@ static int pci_dio_reset(struct comedi_device *dev)
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switch (board->cardtype) {
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case TYPE_PCI1730:
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case TYPE_PCI1733:
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- outb(0, dev->iobase + PCI1730_3_INT_EN);
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- outb(0x0f, dev->iobase + PCI1730_3_INT_CLR);
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- outb(0, dev->iobase + PCI1730_3_INT_RF);
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- break;
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case TYPE_PCI1736:
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- outb(0, dev->iobase + PCI1736_3_INT_EN);
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- outb(0x0f, dev->iobase + PCI1736_3_INT_CLR);
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- outb(0, dev->iobase + PCI1736_3_INT_RF);
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+ outb(0, dev->iobase + PCI173X_INT_EN_REG);
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+ outb(0x0f, dev->iobase + PCI173X_INT_CLR_REG);
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+ outb(0, dev->iobase + PCI173X_INT_RF_REG);
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break;
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case TYPE_PCI1739:
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outb(0x88, dev->iobase + PCI1739_ICR);
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