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@@ -242,6 +242,45 @@
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status = "disabled";
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};
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+ pcie0: pcie@f8000000 {
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+ compatible = "rockchip,rk3399-pcie";
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+ reg = <0x0 0xf8000000 0x0 0x2000000>,
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+ <0x0 0xfd000000 0x0 0x1000000>;
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+ reg-names = "axi-base", "apb-base";
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+ #address-cells = <3>;
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+ #size-cells = <2>;
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+ #interrupt-cells = <1>;
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+ bus-range = <0x0 0x1>;
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+ clocks = <&cru ACLK_PCIE>, <&cru ACLK_PERF_PCIE>,
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+ <&cru PCLK_PCIE>, <&cru SCLK_PCIE_PM>;
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+ clock-names = "aclk", "aclk-perf",
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+ "hclk", "pm";
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+ interrupts = <GIC_SPI 49 IRQ_TYPE_LEVEL_HIGH 0>,
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+ <GIC_SPI 50 IRQ_TYPE_LEVEL_HIGH 0>,
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+ <GIC_SPI 51 IRQ_TYPE_LEVEL_HIGH 0>;
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+ interrupt-names = "sys", "legacy", "client";
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+ interrupt-map-mask = <0 0 0 7>;
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+ interrupt-map = <0 0 0 1 &pcie0_intc 0>,
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+ <0 0 0 2 &pcie0_intc 1>,
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+ <0 0 0 3 &pcie0_intc 2>,
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+ <0 0 0 4 &pcie0_intc 3>;
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+ msi-map = <0x0 &its 0x0 0x1000>;
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+ phys = <&pcie_phy>;
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+ phy-names = "pcie-phy";
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+ ranges = <0x83000000 0x0 0xfa000000 0x0 0xfa000000 0x0 0x600000
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+ 0x81000000 0x0 0xfa600000 0x0 0xfa600000 0x0 0x100000>;
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+ resets = <&cru SRST_PCIE_CORE>, <&cru SRST_PCIE_MGMT>,
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+ <&cru SRST_PCIE_MGMT_STICKY>, <&cru SRST_PCIE_PIPE>;
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+ reset-names = "core", "mgmt", "mgmt-sticky", "pipe";
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+ status = "disabled";
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+
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+ pcie0_intc: interrupt-controller {
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+ interrupt-controller;
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+ #address-cells = <0>;
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+ #interrupt-cells = <1>;
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+ };
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+ };
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+
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usb_host0_ehci: usb@fe380000 {
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compatible = "generic-ehci";
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reg = <0x0 0xfe380000 0x0 0x20000>;
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@@ -1580,5 +1619,18 @@
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<1 14 RK_FUNC_1 &pcfg_pull_none>;
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};
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};
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+
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+ pcie {
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+ pcie_clkreqn: pci-clkreqn {
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+ rockchip,pins =
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+ <2 26 RK_FUNC_2 &pcfg_pull_none>;
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+ };
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+
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+ pcie_clkreqnb: pci-clkreqnb {
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+ rockchip,pins =
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+ <4 24 RK_FUNC_1 &pcfg_pull_none>;
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+ };
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+ };
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+
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};
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};
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