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@@ -15,6 +15,8 @@
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#include <linux/cache.h>
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#include <linux/types.h>
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+#include <asm/mipsregs.h>
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+
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/*
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* Descriptor for a cache
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*/
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@@ -77,16 +79,9 @@ struct cpuinfo_mips {
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struct cache_desc tcache; /* Tertiary/split secondary cache */
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int srsets; /* Shadow register sets */
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int package;/* physical package number */
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- int core; /* physical core number */
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+ unsigned int globalnumber;
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#ifdef CONFIG_64BIT
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int vmbits; /* Virtual memory size in bits */
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-#endif
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-#if defined(CONFIG_MIPS_MT_SMP) || defined(CONFIG_CPU_MIPSR6)
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- /*
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- * There is not necessarily a 1:1 mapping of VPE num to CPU number
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- * in particular on multi-core systems.
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- */
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- int vpe_id; /* Virtual Processor number */
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#endif
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void *data; /* Additional data */
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unsigned int watch_reg_count; /* Number that exist */
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@@ -146,31 +141,23 @@ struct proc_cpuinfo_notifier_args {
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static inline unsigned int cpu_core(struct cpuinfo_mips *cpuinfo)
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{
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- return cpuinfo->core;
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-}
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-
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-static inline void cpu_set_core(struct cpuinfo_mips *cpuinfo,
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- unsigned int core)
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-{
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- cpuinfo->core = core;
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+ return (cpuinfo->globalnumber & MIPS_GLOBALNUMBER_CORE) >>
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+ MIPS_GLOBALNUMBER_CORE_SHF;
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}
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static inline unsigned int cpu_vpe_id(struct cpuinfo_mips *cpuinfo)
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{
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-#if defined(CONFIG_MIPS_MT_SMP) || defined(CONFIG_CPU_MIPSR6)
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- return cpuinfo->vpe_id;
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-#endif
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- return 0;
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-}
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+ /* Optimisation for systems where VP(E)s aren't used */
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+ if (!IS_ENABLED(CONFIG_MIPS_MT_SMP) && !IS_ENABLED(CONFIG_CPU_MIPSR6))
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+ return 0;
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-static inline void cpu_set_vpe_id(struct cpuinfo_mips *cpuinfo,
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- unsigned int vpe)
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-{
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-#if defined(CONFIG_MIPS_MT_SMP) || defined(CONFIG_CPU_MIPSR6)
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- cpuinfo->vpe_id = vpe;
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-#endif
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+ return (cpuinfo->globalnumber & MIPS_GLOBALNUMBER_VP) >>
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+ MIPS_GLOBALNUMBER_VP_SHF;
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}
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+extern void cpu_set_core(struct cpuinfo_mips *cpuinfo, unsigned int core);
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+extern void cpu_set_vpe_id(struct cpuinfo_mips *cpuinfo, unsigned int vpe);
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+
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static inline unsigned long cpu_asid_inc(void)
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{
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return 1 << CONFIG_MIPS_ASID_SHIFT;
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