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@@ -129,6 +129,9 @@
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* 40 bits wide (T0SZ = 24). Systems with a PARange smaller than 40 bits are
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* not known to exist and will break with this configuration.
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*
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+ * VTCR_EL2.PS is extracted from ID_AA64MMFR0_EL1.PARange at boot time
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+ * (see hyp-init.S).
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+ *
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* Note that when using 4K pages, we concatenate two first level page tables
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* together.
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*
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@@ -138,7 +141,6 @@
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#ifdef CONFIG_ARM64_64K_PAGES
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/*
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* Stage2 translation configuration:
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- * 40bits output (PS = 2)
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* 40bits input (T0SZ = 24)
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* 64kB pages (TG0 = 1)
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* 2 level page tables (SL = 1)
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@@ -150,7 +152,6 @@
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#else
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/*
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* Stage2 translation configuration:
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- * 40bits output (PS = 2)
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* 40bits input (T0SZ = 24)
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* 4kB pages (TG0 = 0)
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* 3 level page tables (SL = 1)
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