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@@ -1126,7 +1126,6 @@ static irqreturn_t iwl_pcie_isr(int irq, void *data)
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struct iwl_trans *trans = data;
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struct iwl_trans_pcie *trans_pcie = IWL_TRANS_GET_PCIE_TRANS(trans);
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u32 inta, inta_mask;
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- irqreturn_t ret = IRQ_NONE;
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lockdep_assert_held(&trans_pcie->irq_lock);
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@@ -1155,7 +1154,16 @@ static irqreturn_t iwl_pcie_isr(int irq, void *data)
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* or due to sporadic interrupts thrown from our NIC. */
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if (!inta) {
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IWL_DEBUG_ISR(trans, "Ignore interrupt, inta == 0\n");
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- goto none;
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+ /*
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+ * Re-enable interrupts here since we don't have anything to
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+ * service, but only in case the handler won't run. Note that
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+ * the handler can be scheduled because of a previous
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+ * interrupt.
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+ */
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+ if (test_bit(STATUS_INT_ENABLED, &trans_pcie->status) &&
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+ !trans_pcie->inta)
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+ iwl_enable_interrupts(trans);
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+ return IRQ_NONE;
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}
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if ((inta == 0xFFFFFFFF) || ((inta & 0xFFFFFFF0) == 0xa5a5a5a0)) {
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@@ -1173,19 +1181,7 @@ static irqreturn_t iwl_pcie_isr(int irq, void *data)
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trans_pcie->inta |= inta;
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/* the thread will service interrupts and re-enable them */
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- if (likely(inta))
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- return IRQ_WAKE_THREAD;
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-
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- ret = IRQ_HANDLED;
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-
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-none:
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- /* re-enable interrupts here since we don't have anything to service. */
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- /* only Re-enable if disabled by irq and no schedules tasklet. */
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- if (test_bit(STATUS_INT_ENABLED, &trans_pcie->status) &&
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- !trans_pcie->inta)
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- iwl_enable_interrupts(trans);
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-
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- return ret;
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+ return IRQ_WAKE_THREAD;
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}
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/* interrupt handler using ict table, with this interrupt driver will
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