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@@ -449,7 +449,8 @@ static void mdp5_crtc_enable(struct drm_crtc *crtc)
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}
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int mdp5_crtc_setup_pipeline(struct drm_crtc *crtc,
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- struct drm_crtc_state *new_crtc_state)
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+ struct drm_crtc_state *new_crtc_state,
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+ bool need_right_mixer)
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{
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struct mdp5_crtc_state *mdp5_cstate =
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to_mdp5_crtc_state(new_crtc_state);
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@@ -459,15 +460,32 @@ int mdp5_crtc_setup_pipeline(struct drm_crtc *crtc,
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new_mixer = !pipeline->mixer;
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+ if ((need_right_mixer && !pipeline->r_mixer) ||
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+ (!need_right_mixer && pipeline->r_mixer))
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+ new_mixer = true;
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+
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if (new_mixer) {
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struct mdp5_hw_mixer *old_mixer = pipeline->mixer;
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+ struct mdp5_hw_mixer *old_r_mixer = pipeline->r_mixer;
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+ u32 caps;
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+ int ret;
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+
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+ caps = MDP_LM_CAP_DISPLAY;
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+ if (need_right_mixer)
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+ caps |= MDP_LM_CAP_PAIR;
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- pipeline->mixer = mdp5_mixer_assign(new_crtc_state->state, crtc,
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- MDP_LM_CAP_DISPLAY);
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- if (IS_ERR(pipeline->mixer))
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- return PTR_ERR(pipeline->mixer);
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+ ret = mdp5_mixer_assign(new_crtc_state->state, crtc, caps,
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+ &pipeline->mixer, need_right_mixer ?
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+ &pipeline->r_mixer : NULL);
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+ if (ret)
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+ return ret;
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mdp5_mixer_release(new_crtc_state->state, old_mixer);
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+ if (old_r_mixer) {
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+ mdp5_mixer_release(new_crtc_state->state, old_r_mixer);
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+ if (!need_right_mixer)
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+ pipeline->r_mixer = NULL;
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+ }
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}
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/*
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@@ -544,7 +562,9 @@ static int mdp5_crtc_atomic_check(struct drm_crtc *crtc,
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struct plane_state pstates[STAGE_MAX + 1];
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const struct mdp5_cfg_hw *hw_cfg;
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const struct drm_plane_state *pstate;
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+ const struct drm_display_mode *mode = &state->adjusted_mode;
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bool cursor_plane = false;
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+ bool need_right_mixer = false;
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int cnt = 0, i;
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int ret;
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enum mdp_mixer_stage_id start;
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@@ -555,6 +575,12 @@ static int mdp5_crtc_atomic_check(struct drm_crtc *crtc,
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pstates[cnt].plane = plane;
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pstates[cnt].state = to_mdp5_plane_state(pstate);
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+ /*
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+ * if any plane on this crtc uses 2 hwpipes, then we need
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+ * the crtc to have a right hwmixer.
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+ */
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+ if (pstates[cnt].state->r_hwpipe)
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+ need_right_mixer = true;
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cnt++;
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if (plane->type == DRM_PLANE_TYPE_CURSOR)
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@@ -565,7 +591,16 @@ static int mdp5_crtc_atomic_check(struct drm_crtc *crtc,
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if (!cnt)
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return 0;
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- ret = mdp5_crtc_setup_pipeline(crtc, state);
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+ hw_cfg = mdp5_cfg_get_hw_config(mdp5_kms->cfg);
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+
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+ /*
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+ * we need a right hwmixer if the mode's width is greater than a single
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+ * LM's max width
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+ */
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+ if (mode->hdisplay > hw_cfg->lm.max_width)
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+ need_right_mixer = true;
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+
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+ ret = mdp5_crtc_setup_pipeline(crtc, state, need_right_mixer);
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if (ret) {
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dev_err(dev->dev, "couldn't assign mixers %d\n", ret);
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return ret;
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@@ -583,8 +618,6 @@ static int mdp5_crtc_atomic_check(struct drm_crtc *crtc,
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/* verify that there are not too many planes attached to crtc
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* and that we don't have conflicting mixer stages:
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*/
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- hw_cfg = mdp5_cfg_get_hw_config(mdp5_kms->cfg);
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-
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if ((cnt + start - 1) >= hw_cfg->lm.nb_stages) {
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dev_err(dev->dev, "too many planes! cnt=%d, start stage=%d\n",
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cnt, start);
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