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@@ -120,7 +120,57 @@ static void omap_crtc_start_update(struct omap_overlay_manager *mgr)
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{
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}
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-static void set_enabled(struct drm_crtc *crtc, bool enable);
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+/* Called only from CRTC pre_apply and suspend/resume handlers. */
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+static void omap_crtc_set_enabled(struct drm_crtc *crtc, bool enable)
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+{
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+ struct drm_device *dev = crtc->dev;
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+ struct omap_crtc *omap_crtc = to_omap_crtc(crtc);
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+ enum omap_channel channel = omap_crtc->channel;
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+ struct omap_irq_wait *wait;
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+ u32 framedone_irq, vsync_irq;
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+ int ret;
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+
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+ if (dispc_mgr_is_enabled(channel) == enable)
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+ return;
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+
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+ /*
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+ * Digit output produces some sync lost interrupts during the first
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+ * frame when enabling, so we need to ignore those.
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+ */
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+ omap_irq_unregister(crtc->dev, &omap_crtc->error_irq);
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+
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+ framedone_irq = dispc_mgr_get_framedone_irq(channel);
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+ vsync_irq = dispc_mgr_get_vsync_irq(channel);
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+
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+ if (enable) {
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+ wait = omap_irq_wait_init(dev, vsync_irq, 1);
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+ } else {
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+ /*
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+ * When we disable the digit output, we need to wait for
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+ * FRAMEDONE to know that DISPC has finished with the output.
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+ *
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+ * OMAP2/3 does not have FRAMEDONE irq for digit output, and in
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+ * that case we need to use vsync interrupt, and wait for both
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+ * even and odd frames.
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+ */
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+
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+ if (framedone_irq)
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+ wait = omap_irq_wait_init(dev, framedone_irq, 1);
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+ else
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+ wait = omap_irq_wait_init(dev, vsync_irq, 2);
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+ }
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+
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+ dispc_mgr_enable(channel, enable);
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+
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+ ret = omap_irq_wait(dev, wait, msecs_to_jiffies(100));
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+ if (ret) {
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+ dev_err(dev->dev, "%s: timeout waiting for %s\n",
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+ omap_crtc->name, enable ? "enable" : "disable");
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+ }
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+
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+ omap_irq_register(crtc->dev, &omap_crtc->error_irq);
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+}
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+
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static int omap_crtc_enable(struct omap_overlay_manager *mgr)
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{
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@@ -129,7 +179,7 @@ static int omap_crtc_enable(struct omap_overlay_manager *mgr)
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dispc_mgr_setup(omap_crtc->channel, &omap_crtc->info);
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dispc_mgr_set_timings(omap_crtc->channel,
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&omap_crtc->timings);
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- set_enabled(&omap_crtc->base, true);
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+ omap_crtc_set_enabled(&omap_crtc->base, true);
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return 0;
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}
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@@ -138,7 +188,7 @@ static void omap_crtc_disable(struct omap_overlay_manager *mgr)
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{
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struct omap_crtc *omap_crtc = omap_crtcs[mgr->id];
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- set_enabled(&omap_crtc->base, false);
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+ omap_crtc_set_enabled(&omap_crtc->base, false);
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}
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static void omap_crtc_set_timings(struct omap_overlay_manager *mgr,
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@@ -537,57 +587,6 @@ int omap_crtc_apply(struct drm_crtc *crtc,
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return 0;
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}
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-/* called only from apply */
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-static void set_enabled(struct drm_crtc *crtc, bool enable)
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-{
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- struct drm_device *dev = crtc->dev;
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- struct omap_crtc *omap_crtc = to_omap_crtc(crtc);
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- enum omap_channel channel = omap_crtc->channel;
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- struct omap_irq_wait *wait;
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- u32 framedone_irq, vsync_irq;
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- int ret;
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-
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- if (dispc_mgr_is_enabled(channel) == enable)
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- return;
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-
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- /*
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- * Digit output produces some sync lost interrupts during the first
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- * frame when enabling, so we need to ignore those.
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- */
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- omap_irq_unregister(crtc->dev, &omap_crtc->error_irq);
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-
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- framedone_irq = dispc_mgr_get_framedone_irq(channel);
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- vsync_irq = dispc_mgr_get_vsync_irq(channel);
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-
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- if (enable) {
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- wait = omap_irq_wait_init(dev, vsync_irq, 1);
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- } else {
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- /*
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- * When we disable the digit output, we need to wait for
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- * FRAMEDONE to know that DISPC has finished with the output.
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- *
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- * OMAP2/3 does not have FRAMEDONE irq for digit output, and in
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- * that case we need to use vsync interrupt, and wait for both
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- * even and odd frames.
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- */
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-
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- if (framedone_irq)
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- wait = omap_irq_wait_init(dev, framedone_irq, 1);
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- else
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- wait = omap_irq_wait_init(dev, vsync_irq, 2);
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- }
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-
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- dispc_mgr_enable(channel, enable);
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-
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- ret = omap_irq_wait(dev, wait, msecs_to_jiffies(100));
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- if (ret) {
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- dev_err(dev->dev, "%s: timeout waiting for %s\n",
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- omap_crtc->name, enable ? "enable" : "disable");
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- }
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-
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- omap_irq_register(crtc->dev, &omap_crtc->error_irq);
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-}
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-
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static void omap_crtc_pre_apply(struct omap_drm_apply *apply)
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{
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struct omap_crtc *omap_crtc =
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