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@@ -38,7 +38,7 @@
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#define MDREFR_DB2_MASK (MDREFR_K2DB2 | MDREFR_K1DB2)
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#define MDREFR_DRI_MASK 0xFFF
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-DEFINE_SPINLOCK(lock);
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+static DEFINE_SPINLOCK(pxa_clk_lock);
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static struct clk *pxa_clocks[CLK_MAX];
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static struct clk_onecell_data onecell_data = {
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@@ -109,7 +109,7 @@ int __init clk_pxa_cken_init(const struct desc_clk_cken *clks, int nb_clks)
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pxa_clk->lp = clks[i].lp;
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pxa_clk->hp = clks[i].hp;
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pxa_clk->gate = clks[i].gate;
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- pxa_clk->gate.lock = &lock;
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+ pxa_clk->gate.lock = &pxa_clk_lock;
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clk = clk_register_composite(NULL, clks[i].name,
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clks[i].parent_names, 2,
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&pxa_clk->hw, &cken_mux_ops,
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@@ -155,7 +155,8 @@ void pxa2xx_core_turbo_switch(bool on)
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}
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void pxa2xx_cpll_change(struct pxa2xx_freq *freq,
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- u32 (*mdrefr_dri)(unsigned int), u32 *mdrefr, u32 *cccr)
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+ u32 (*mdrefr_dri)(unsigned int), void __iomem *mdrefr,
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+ void __iomem *cccr)
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{
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unsigned int clkcfg = freq->clkcfg;
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unsigned int unused, preset_mdrefr, postset_mdrefr;
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